Z87C33 Datasheet, PDF (19/72 Pages) Zilog, Inc. – CMOS Z8® MCU Consumer Controller Processor

Z87C33
CMOS Z8“ MCU Consumer Controller Processor
13
Memory, instructions LDC, LDCI, LDE, and LDEI can read Internal Program Mem-
ory.
RAM Protect. The upper portion of the RAM’s address spaces 80h to EFh (exclud-
ing the control registers) can be protected from writing. The RAM Protect option
bit can be selected when the device is programmed. After the mask option is
selected, the user activates this feature from the internal ROM code to turn off/on
the RAM Protect by loading either a 0 or a 1 into the IMR register, bit D6. A 1 in bit
D6 enables the RAM Protect option.
Working Register File. The Z8 standard register file (Bank 0) contains 3 I/O port
registers, 237 general-purpose registers, and 15 control and status registers.
Expanded register file Bank Fh contains 4 system-configuration registers. The
working registers are accessed directly or indirectly via an 8-bit address field. As a
result, a short 4-bit register address can use the Register Pointer (Table 5 and
Figure 9). In the 4-bit mode, the working register file is divided into 16 working reg-
ister groups, each occupying 16 continuous locations. The Register Pointer
addresses the starting location of the active working register group.
Throughout this document, Bank 0 is referred to as the Z8 Standard Register File.
Table 4. Register Pointer Register—RP FDh/R253 Bank 0h: READ/WRITE
Bit
D7 D6 D5
R/W
R/W R/W R/W
Reset
0
0
0
Note: R = Read, W = Write, X = Indeterminate.
D4
R/W
0
D3
R/W
0
D2
D1
D0
R/W R/W R/W
0
0
0
Bit
Position
D7–D4
Bit
Field
Working Registers
D3–D0 ERF
Reset
R/W State Description
R/W
0 Working Register Group
Pointer
R/W
0 Expanded Register File
Expanded Register File (ERF). The Z8 register file is expanded to allow for addi-
tional system control registers, and for mapping of additional peripheral devices,
along with the I/O ports, into the register address area. The Z8 register address
space 0 through 255 is implemented as 16 groups of 16 registers per bank (Fig-
ures 8 and 9 ). There are 16 banks known as the Expanded Register File (ERF).
Bits 7–4 of register RP select the Working Register Group. Bits 3–0 of register RP
select the Expanded Register File Bank. Four system configuration registers
reside in the Expanded Register File at Bank Fh—PCON, SMR, SMR2, and
WDTMR. The remainder of the Expanded Register is not physically implemented,
and is open for future expansion.
PS015601-1003