Z87C33 Datasheet, PDF (48/72 Pages) Zilog, Inc. – CMOS Z8® MCU Consumer Controller Processor

Z87C33
CMOS Z8“ MCU Consumer Controller Processor
42
Bit
Position
D7–D0
Bit
Field
GPR
Reset
R/W State Description
R/W
0 General Purpose Register (D7-D0)
Stack Pointer Low Register
The Stack Pointer Low Register, SPL, controls pointer functions in the lower byte.
READ/WRITE and reset states for bits D7–D0 are listed in Table 30.
Table 30. Stack Pointer Low—SPL FFh/R255 Bank 0h: READ/WRITE
Bit
D7
R/W
R/W
Reset
0
Note: R = Read, W = Write.
D6 D5
R/W R/W
0
0
D4
R/W
0
D3
R/W
0
D2
D1
D0
R/W R/W R/W
0
0
0
Bit
Position
D7–D0
Bit
Field
SPL
Reset
R/W State Description
R/W
0 Stack Pointer Lower Byte (SP7–SP0)
Expanded Register File, Bank Fh
Expanded Register File Bank Fh contains 4 registers that perform the Port Config-
uration, Stop-Mode Recovery, and Watch-Dog Timer Mode functions, as shown in
Tables 31 through 35. These 4 registers are not reset by a Stop-Mode Recovery.
Table 31 lists the reset states of all 4 Bank Fh registers.
Table 31. Expanded Register File Registers—Reset States
D7
D6
D5
D4
D3
D2
D1
D0
00h
PCON*
1
1
1
1
1
1
1
0
01h
Reserved
02h
Reserved
03h
Reserved
04h
Reserved
05h
Reserved
06h
Reserved
Note: *Not reset with a Stop-Mode Recovery.
Note: **Not reset with a Stop-Mode Recovery except Bit D7.
PS015601-1003