Z16C30 Datasheet, PDF (38/86 Pages) Zilog, Inc. – CMOS USC Universal Controller

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0 is represented by a transition at the beginning of the bit
cell.
$KRJCUG/CTM In Biphase-Mark, a 1 is represented by a
transition at the beginning of the bit cell and another tran-
sition at the center of the bit cell. A 0 is represented by a
transition at the beginning of the bit cell only.
$KRJCUG5RCEG In Biphase-Space, a 1 is represented by a
transition at the beginning of the bit cell only. A 0 is repre-
sented by a transition at the beginning of the bit cell and an-
other transition at the center of the bit cell.
$KRJCUG.GXGN In Biphase-Level, a 1 is represented by a
High during the first half of the bit cell and a Low during
the second half of the bit cell. A 0 is represented by a Low
during the first half of the bit cell and a High during the sec-
ond half of the bit cell.
Data
1
1
0
0
1
0
NRZ
NRZB
NRZI-M
NRZI-S
BI-PHASE-M
BIPHASE-S
BIPHASE-L
DIFFERENTIAL
BIPHASE-L
(KIWTG  &CVC 'PEQFKPI
&KHHGTGPVKCN $KRJCUG.GXGN In Differential Biphase-Level,
a “1” is represented by a transition at the center of the bit
cell, with the opposite polarity from the transition at the cen-
ter of the preceding bit cell. A 0 is represented by a transition
at the center of the bit cell with the same polarity as the tran-
sition at the center of the preceding bit cell. In both cases
there may be transitions at the beginning of the bit cell to
set up the level required to make the correct center transi-
tion.
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Each channel in the USC contains a 16-bit character counter
for both receiver and transmitter. The receive character
counter may be preset either under software control or au-
tomatically at the beginning of a receive message. The
counter decrements with each receive character and at the
end of the receive message the current value in the counter
is automatically loaded into a four-deep FIFO. This allows
DMA transfer of data to proceed without CPU intervention
at the end of a received message, as the values in the FIFO

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