Z8F042ASJ020EG2156 Datasheet, PDF (36/280 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F082A Series
Product Specification
20
Table 7. Register File Address Map (Continued)
Address (Hex) Register Description
F85
Reserved
Mnemonic
—
Oscillator Control
F86
Oscillator Control
F87–F8F
Reserved
Comparator 0
F90
Comparator 0 Control
F91–FBF
Reserved
OSCCTL
—
CMP0
—
Interrupt Controller
FC0
Interrupt Request 0
FC1
IRQ0 Enable High Bit
FC2
IRQ0 Enable Low Bit
FC3
Interrupt Request 1
FC4
IRQ1 Enable High Bit
FC5
IRQ1 Enable Low Bit
FC6
Interrupt Request 2
FC7
IRQ2 Enable High Bit
FC8
IRQ2 Enable Low Bit
FC9–FCC
Reserved
FCD
Interrupt Edge Select
FCE
Shared Interrupt Select
FCF
Interrupt Control
IRQ0
IRQ0ENH
IRQ0ENL
IRQ1
IRQ1ENH
IRQ1ENL
IRQ2
IRQ2ENH
IRQ2ENL
—
IRQES
IRQSS
IRQCTL
GPIO Port A
FD0
FD1
FD2
FD3
Port A Address
Port A Control
Port A Input Data
Port A Output Data
PAADDR
PACTL
PAIN
PAOUT
GPIO Port B
FD4
Port B Address
FD5
Port B Control
FD6
Port B Input Data
FD7
Port B Output Data
GPIO Port C
FD8
Port C Address
Notes:
1. XX = Undefined.
2. Refer to the eZ8 CPU Core User Manual (UM0128).
PBADDR
PBCTL
PBIN
PBOUT
PCADDR
Reset (Hex)
XX
A0
XX
14
XX
00
00
00
00
00
00
00
00
00
XX
00
00
00
00
00
XX
00
00
00
XX
00
00
Page
196
141
60
63
63
61
65
65
62
66
67
68
68
69
44
46
46
46
44
46
46
46
44
PS022828-0413
PRELIMINARY
Register Map