Z8F042ASJ020EG2156 Datasheet, PDF (198/280 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F082A Series
Product Specification
183
• If the PA2/RESET pin is held Low while a 32-bit key sequence is issued to the PA0/
DBG pin, the DBG feature is unlocked. After releasing PA2/RESET, it is pulled High.
At this point, the PA0/DBG pin may be used to autobaud and cause the device to enter
Debug Mode. See the OCD Unlock Sequence (8-Pin Devices Only) section on
page 185.
Exiting Debug Mode
The device exits Debug Mode following any of these operations:
• Clearing the DBGMODE bit in the OCD Control Register to 0
• Power-On Reset
• Voltage Brown-Out reset
• Watchdog Timer reset
• Asserting the RESET pin Low to initiate a Reset
• Driving the DBG pin Low while the device is in Stop Mode initiates a System Reset
OCD Data Format
The OCD interface uses the asynchronous data format defined for RS-232. Each character
transmitted and received by the OCD consists of 1 Start bit, 8 data bits (least-significant
bit first) and 1 Stop bit as displayed in Figure 26.
START
D0
D1
D2
D3
D4
D5
D6
D7 STOP
Figure 26. OCD Data Format
Note:
When responding to a request for data, the OCD may commence transmitting immediately
after receiving the stop bit of an incoming frame. Therefore, when sending the stop bit, the
host must not actively drive the DBG pin High for more than 0.5 bit times. Zilog recom-
mends that, if possible, the host drives the DBG pin using an open drain output to avoid
this issue.
OCD Auto-Baud Detector/Generator
To run over a range of baud rates (data bits per second) with various system clock frequen-
cies, the On-Chip Debugger contains an Auto-Baud Detector/Generator. After a reset, the
OCD is idle until it receives data. The OCD requires that the first character sent from the
PS022828-0413
PRELIMINARY
Operation