YGV639 Datasheet, PDF (26/34 Pages) YAMAHA CORPORATION – Video Controller 1 with Enhanced Functions

YGV639
CPU Interface
Parallel Interface
No.
Item
Code
Min.
Typ.
Max.
Unit Note
1 PS2-0: setup time
t_sA
4
1
2 PS2-0: hold time
t_hA
0
1
3 CS_N: setup time
t_sCS
0
2
4 CS_N: hold time
5 D7-0: output data turn on time
6 D7-0: output data turn off time
t_hCS
0
t_onD
0
t_offD
2
30
7 D7-0: output data valid delay time
t_dD
8 D7-0: output data hold time
t_hD
0
9 WAIT_N, READY_N: turn on time
t_onWAIT
0
WAIT_N, READY_N: valid delay
10
time
t_dWAIT
0
ns
25
11 WAIT_N, READY_N: turn off time
t_offWAIT
30
12 D7-0: input data setup time
t_sD
t_SYCLK+15
13 D7-0: input data hold time
t_hD
2
14 READY_N: hold time
15 command pulse active time
16 command pulse inhibit time
t_hREADY
t_aCMD
t_iCMD
0
2×t_SYCLK
4×t_SYCLK
30
3
3
17 command cycle time
t_cCMD
6×t_SYCLK
3
Note 1) Regulations for WR_N and RD_N signals; however, in CS_N control, there are regulations for
CS_N.
Note 2) Conditions that prove to be WR_N and RD_N controls. If these conditions are not met, these are for
CS_N control.
Note 3) “command pulse” means a low active pulse obtained by performing OR operation between CS_N
signal and each of WR_N and RD_N signals.
i) CPU Read Cycle
PS2-0
CS_N
RD_N
D7-0
WAIT_N
1
3
5
Hi-Z
10
9
Hi-Z
9
READY_N Hi-Z
2
4
6
8
Hi-Z
7
11
Hi-Z
7
14
11
Hi-Z
26