YGV639 Datasheet, PDF (15/34 Pages) YAMAHA CORPORATION – Video Controller 1 with Enhanced Functions

YGV639
Pattern Memory Interface
These pins are used for interface with a pattern memory connected to VC1E local buses. Mask-ROM,
NOR-type flash memory and SRAM, etc. can be connected as a pattern memory.
Pattern Memory Data Bus
MD15-0 (Input and Output)
Data input-output bus for a pattern memory. When the data bus width of a pattern memory is 16 bits,
connect an external memory to MD15-0. When the data bus width is 8 bits, connect an external memory to
MD7-0 and pull up MD15-8. The data bus width of a pattern memory is set by the register (R#5: BW).
MD15-0 serve as output pins only for the write access to a pattern memory; otherwise, they serve as input
pins. However, when the pattern memory bus is set to 8 bits, MD15-8 serve as input pins, even in the write
access.
MD15-0 pins become high impedance when RAHZ_N= “L.” And, when core power supply is shut down
with the activation of the over current protection circuit, this pin becomes high impedance due to the voltage
decrease.
It is recommended to connect an external pull-up resistor of 10kΩ to 50kΩ to this pin.
Pattern Memory Address Bus
MA25-0 (3-State Output)
Address bus output pins for the pattern memory. When the data bus width of a pattern memory is 16 bits,
connect it to MA25-1. When the width is 8 bits, connect it to MA25-0. When RAHZ_N is “L” level or when
core power supply is shut down by the overcurrent protection circuit in the internal regulator, MA25-0 pins
become high impedance.
Pattern Memory Output Enable Pin
MOE_N (3-State Output)
Pattern memory output enable pin. This pin is low active.
When RAHZ_N is “L” level, MOE_N pin becomes high impedance. And, when core power supply is shut
down with the activation of the over current protection circuit, this pin becomes high impedance due to the
voltage decrease. It is recommended to attach an external pull-up resistor 10kΩ to 50kΩ to this pin.
Pattern Memory Write Strobe Output Pin
MWE_N (3-State Output)
Writing enable output pin for pattern memory. This pin is low active.
When RAHZ_N is “L” level, MWE_N pin becomes high impedance. And, when core power supply is
shut down with the activation of the over current protection circuit, this pin becomes high impedance due to
the voltage decrease. It is recommended to attach an external pull-up resistor 10kΩ to 50kΩ to this pin.
Pattern Memory High-Impedance Switching Pin
RAHZ_N (Input)
Sets the Interface pins for the pattern memory to high impedance. Assert this pin to separate the pattern
memory electrically from VC1E. This pin is low active.
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