DS495 Datasheet, PDF (6/12 Pages) Xilinx, Inc – PCI Arbiter

PCI Arbiter (v1.00a)
Figure 3 shows the PCI_Arbiter operation when a requesting PCI master agent fails to respond. Once
grant is asserted, the requesting PCI master agent must assert PCI_Frame_n within 16 clock cycles to
obtain control of the bus. Failing this, the requesting PCI master agent will lose its bus privilege and
cannot be recorded as the last active master. In this case master agent number four requests the bus by
asserting PCI_Req_n(4) and fails to assert PCI_Frame_n within its window of opportunity. This causes
the PCI_Arbiter to remove the PCI_Gnt_n(4), retain the prior last active master, and return to park
mode. If PCI_Req_n(4) remained asserted, the PCI_Arbiter would continue asserting PCI_Gnt_n(4) for
16 clock cycles for another time-out unless a different master agent requests the bus. This behavior
arises from the uncertainty of the PCI_Arbiter “knowing” if a request is valid, as all requests must be
treated as valid. To prevent this behavior, master agents must respond to grant.
Figure Top x-ref 3
pci_clk
pci_rst_n
pci_req_n(0)
pci_req_n(1)
pci_req_n(2)
pci_req_n(3)
pci_req_n(4)
pci_req_n(5)
pci_frame
pci_irdy_n
pci_gnt_n(0)
pci_gnt_n(1)
pci_gnt_n(2)
pci_gnt_n(3)
pci_gnt_n(4)
pci_gnt_n(5)
Figure 3: Grant Removed After 18 Clocks if Master Does Not Respond
X495_03_101106
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DS495 April 8, 2009
Product Specification