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DS495 Datasheet, PDF (10/12 Pages) Xilinx, Inc – PCI Arbiter
PCI Arbiter (v1.00a)
Figure Top x-ref 10
pci_clk
pci_rst_n
pci_req_n(0)
pci_req_n(1)
pci_req_n(2)
pci_req_n(3)
pci_req_n(4)
pci_req_n(5)
pci_frame
pci_irdy_n
pci_gnt_n(0)
pci_gnt_n(1)
pci_gnt_n(2)
pci_gnt_n(3)
pci_gnt_n(4)
pci_gnt_n(5)
X495_10_101306
Figure 10: PCI_Arbiter Grant to a Second Master After First Fails to Respond and Goes Away
Figure 11 shows the situation of a master agent, number zero, requesting and gaining access, then
going away. During the bus transaction for master agent zero, a second master, number one, requests
access. The PCI Arbiter detects this as a multiple request situation even though the first request
expired. The PCI Arbiter responds by deasserting grant zero forcing the master agent zero’s latency
timer to activate and eventually terminate the bus transaction for master zero. Following this, the PCI
Arbiter grants access to master agent one which then proceeds with its own transaction. In this case
master one is the last active master and becomes the parking agent of choice for the PCI Arbiter.
Figure Top x-ref 11
pci_clk
pci_rst_n
pci_req_n(0)
pci_req_n(1)
pci_req_n(2)
pci_req_n(3)
pci_req_n(4)
pci_req_n(5)
pci_frame
pci_irdy_n
pci_gnt_n(0)
pci_gnt_n(1)
pci_gnt_n(2)
pci_gnt_n(3)
pci_gnt_n(4)
pci_gnt_n(5)
X495_11_101306
Figure 11: PCI_Arbiter Detects Multiple Request Even After First Request is Removed
10
www.xilinx.com
DS495 April 8, 2009
Product Specification