DS495 Datasheet, PDF (11/12 Pages) Xilinx, Inc – PCI Arbiter

PCI Arbiter (v1.00a)
Design Implementation
Design Tools
The PCI_Arbiter was designed and implemented using VHDL. Logic simulations, both functional and
post implementation verification, were performed with Model Technology ModelSim.
Target Technologies
The intended target technologies are Xilinx Spartan-3, Virtex-4 and Virtex-5 FPGAs.
Device Utilization and Timing
Because the PCI_Arbiter will be used with other design modules in the FPGA, the utilization and
timing numbers reported in this section are estimates only. As the PCI_Arbiter is combined with other
portions of the FPGA design, the utilization of FPGA resources and timing of the PCI_Arbiter design
will vary from the results shown in Table 5 and in Table 6.
The PCI_Arbiter resource utilization measured with the Virtex-4 FPGA as the target device are detailed
in Table 5.
Table 5: Performance and Resource Utilization Benchmarks on Virtex-4 FPGA (xc4vlx60-11-ff1148)
Sr. No.
Parameter Values
C_NUM_PCI_MSTRS
Slices
Device Resources
Slice Flip -
Flops
4 - Input LUTs
f_MAX(MHz)
1
2
44
39
68
144.76
2
3
57
50
81
114.68
3
4
63
57
89
126.31
4
5
85
74
111
105.33
5
6
104
83
143
100.25
6
7
111
92
147
100.47
7
8
129
100
165
100.01
DS495 April 8, 2009
www.xilinx.com
11
Product Specification