DS571 Datasheet, PDF (13/16 Pages) Xilinx, Inc – LogiCORE IP XPS UART Lite

LogiCORE IP XPS UART Lite (v1.02.a)
System Performance
To measure the system performance (Fmax) of this core, this core was added to a Virtex-4 FPGA system, a Virtex-5
FPGA system, and a Spartan-3A FPGA system as the Device Under Test (DUT) as shown in Figure 6, Figure 7, and
Figure 8.
Because the XPS UART Lite core will be used with other design modules in the FPGA, the utilization and timing
numbers reported in this section are estimates only. When this core is combined with other designs in the system,
the utilization of FPGA resources and timing of the design will vary from the results reported here.
X-Ref Target - Figure 6
PLBV46
PLBV46
MPMC XPS CDMA XPS CDMA DUT
IPLB1 DPLB1
DPLB0
PPC405
IPLB0
PLBV46
XPS BRAM XPS INTC
XPS GPIO
XPS UART
Lite
Figure 6: Virtex-4 FX System
v4_fx_sys
X-Ref Target - Figure 7
XCL
XCL
MPMC XPS CDMA XPS CDMA DUT
MicroBlaze
PLBV46
XPS BRAM XPS INTC
XPS GPIO
XPS UART
Lite
Figure 7: Virtex-5 LX System
MDM
v5_lxt_sys
DS571 June 22, 2011
www.xilinx.com
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Product Specification