DS632 Datasheet, PDF (10/17 Pages) Xilinx, Inc – PLB interface is based on PLB v4.6 specification

XPS Mailbox (v2.00a)
XPS Mailbox Register Descriptions
Each interface of the XPS Mailbox core has the same set of information registers. The information at
each interface is not identical but rather localized for that interface since the communication is bi-direc-
tional.
Table 6 shows all the XPS Mailbox registers and their addresses for the PLB case. Much of the informa-
tion can be acquired for the FSL case with the FSL<x>_M_Full and FSL<x>_S_Exists flags.
Table 6: XPS Mailbox Registers
Base Address +
Offset (hex)
Register Name
C_BASEADDR + 0x0
WRDATA
C_BASEADDR + 0x4
Reserved
C_BASEADDR + 0x8
RDDATA
C_BASEADDR + 0xC
Reserved
C_BASEADDR + 0x10
STATUS
C_BASEADDR + 0x14
ERROR
C_BASEADDR + 0x18
SIT
C_BASEADDR + 0x1C
RIT
C_BASEADDR + 0x20
IS
C_BASEADDR + 0x24
IE
C_BASEADDR + 0x28
C_BASEADDR + 0x2C
C_BASEADDR + 0x30
C_BASEADDR + 0x34
C_BASEADDR + 0x38
C_BASEADDR + 0x3C
IP
Reserved
Reserved
Reserved
Reserved
Reserved
Access Default
Type Value (hex)
Description
Write
N/A
Write Data address. Write only.
N/A
N/A
Reserved for future use
Read
N/A
Read Data address. Read only
N/A
N/A
Reserved for future use
Read
0x1
Status flags for mailbox. Read only.
Read
0x0
Error flags, clear on read. Read
only.
-
-
Send Interrupt Threshold.
Read/Write
-
-
Receive Interrupt Threshold.
Read/Write
-
-
Interrupt Status register.
Read/Write
-
-
Interrupt Enable register.
Read/Write
-
-
Interrupt Pending register. Read
only
-
-
Reserved for future use
-
-
Reserved for future use
-
-
Reserved for future use
-
-
Reserved for future use
-
-
Reserved for future use
XPS Mailbox Write Data Register (WRDATA)
Writing to this register will result in the data transferred to the RDDATA register at the other interface.
Trying to write while the full flag is set will result in an error and the FULL_ERROR bit will be set. The
register is write only and a read request issued to WRDATA will be ignored. Bit assignment in the
WRDATA register is described in Table 8.
Table 7: Write Data Register
0
WRDATA
C_FSL_DWIDTH-1
10
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DS632 June 24, 2009
Product Specification