W981208BH Datasheet, PDF (9/41 Pages) Winbond – 4M x 4 BANKS x 8 BIT SDRAM

W981208BH
OPERATION MODE
Fully synchronous operations are performed to latch the commands at the positive edges of CLK.
Table 1 shows the truth table for the operation commands.
COMMAND
Bank Active
Bank Precharge
Precharge All
Write
Write with Autoprecharge
Read
Read with Autoprecharge
Mode Register Set
No - Operation
Burst Stop
Device Deselect
Auto - Refresh
Self - Refresh Entry
Self Refresh Exit
Clock suspend Mode
Entry
Power Down Mode Entry
Clock Suspend Mode Exit
Power Down Mode Exit
Data write/Output Enable
Data Write/Output
Disable
Table 1 Truth Table (Note (1) , (2))
DEVICE
STATE
Idle
Any
CKEN-1
CKEN DQM BS0, 1 A10
H
x
x
v
v
H
x
x
v
L
Any
Active (3)
Active (3)
Active (3)
Active (3)
Idle
H
x
x
x
H
H
x
x
v
L
H
x
x
v
H
H
x
x
v
L
H
x
x
v
H
H
x
x
v
v
Any
H
Active (4)
H
Any
H
Idle
H
Idle
H
idle
L
(S.R.)
L
Active
H
Idle
H
Active (5)
H
Active
L
Any
L
(power down)
L
Active
H
x
x
x
x
x
x
x
x
x
x
x
x
H
x
x
x
L
x
x
x
H
x
x
x
H
x
x
x
L
x
x
x
L
x
x
x
L
x
x
x
H
x
x
x
H
x
x
x
H
x
x
x
x
L
x
x
Active
H
x
H
x
x
Notes:
(1) v = valid x = Don't care L = Low Level H = High Level
(2) CKEn signal is input level when commands are provided.
CKEn-1 signal is the input level one clock cycle before the command is issued.
(3) These are state of bank designated by BS0, BS1 signals.
(4) Device state is full page burst operation.
(5) Power Down Mode can not be entered in the burst cycle.
When this command asserts in the burst cycle, device state is clock suspend mode.
A0−A9
A11
v
x
x
v
v
v
v
v
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
CS
RAS
CAS
WE
L
L
L
L
L
L
L
H
L
H
L
H
L
H
L
L
L
H
L
H
H
x
L
L
L
L
H
x
L
H
x
x
H
x
L
H
x
x
H
x
L
H
x
x
x
x
H
H
H
L
H
L
L
L
L
L
L
H
L
H
L
L
H
H
H
L
x
x
L
H
L
H
x
x
H
x
x
x
x
x
H
x
x
x
x
x
H
x
x
x
x
x
Publication Release Date: October 2000
-9-
Revision A1