W981208BH Datasheet, PDF (27/41 Pages) Winbond – 4M x 4 BANKS x 8 BIT SDRAM

Operating Timing Example, continued
Auto Precharge Read (Burst Length = 4, CAS Latency = 3)
W981208BH
(CLK = 100 MHz)
0
1
2
3
4
5
6
7
8
9
10
11
12
13 14
15 16
17
18
19
20 21
22 23
CLK
CS
RAS
CAS
tRC
tRAS
tRP
tRC
tRAS
tRP
WE
BS0
BS1
A10
RAa
tRCD
RAb
tRCD
A0-A9,
RAa
A11
DQM
CKE
DQ
CAw
RAb
tAC
aw0 aw1 aw2 aw3
CAx
tAC
bx0
bx1
bx2 bx3
Bank #0 Active
Read
AP*
Active
Read
AP*
Bank #1
Bank #2
Idle
Bank #3
* AP is the internal precharge start timing
- 27 -
Publication Release Date: October 2000
Revision A1