W79E825A Datasheet, PDF (75/127 Pages) Winbond – 8-BIT MICROCONTROLLER

W79E825A/824A/823B/822B Data Sheet
14 NVM MEMORY
The W79E825 series have NVM data memory of 256/128 bytes for customer’s data store used. The
NVM data memory has four/two pages area and each page has 64 bytes as below figure. The Page
0 address is from FC00h ~ FC3Fh, Page 1 address is from FC40h ~ FC7Fh, Page 2 address is from
FC80h ~ FCBFh, and Page 3 address is from FCC0h ~ FCFFh.
The NVM memory can be read/write by customer program to access. Read NVM data is by MOVC
A,@A+DPTR instruction, and write data is by SFR of NVMADDR, NVMDAT and NVMCON. Before
write data to NVM memory, the page must be erased by providing page address on NVMADDR, which
low byte address of On-Chip Code Memory space will decode, then set EER of NVMCON.7. This will
automatically hold fetch program code and PC Counter, and execute page erase. After finished, this
bit will be cleared by hardware. The erase time is ~ 5ms.
For writing data to NVM memory, user must set address and data to NVMADDR and NVMDAT, then
set EWR of NVMCON.6 to initiate nvm data write. The uC will hold program code and PC Counter,
and then write data to mapping address. Upon write completion, the EWR bit will be cleared by
hardware, the uC will continue execute next instruction. The program time is ~50us.
FFFFH
Unused
Code Memory
FCFFH
FC00H
FBFFH
256 Bytes
NVM
Data Memory
Unused
Code Memory
Page 3
64 bytes
Page 2
64 bytes
Page 1
64 bytes
Page 0
64 bytes
FCFFH
FCC0H
FCBFH
FC80H
FC7FH
FC40H
FC3FH
FC00H
NVM Data Memory Area
4000H/2000H
3FFFH/1FFFH
16K/8K Bytes
On-Chip
Code Memory
0000H
CONFIG 2
CONFIG 1
On-Chip Code Memory Space
Figure 14-1: W79E825/824 Memory Map
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Publication Release Date: February 21, 2008
Revision A9