W79E825A Datasheet, PDF (73/127 Pages) Winbond – 8-BIT MICROCONTROLLER

W79E825A/824A/823B/822B Data Sheet
13.1.4 Mode 2
In Mode 2, the timer/counter is in the Auto Reload Mode. In this mode, TLx acts as 8-bit count register,
while THx holds the reload value. When the TLx register overflows from FFh to 00h, the TFx bit in
TCON is set and TLx is reloaded with the contents of THx, and the counting process continues from
here. The reload operation leaves the contents of the THx register unchanged. Counting is enabled by
the TRx bit and proper setting of GATE and INTx pins. As in the other two modes 0 and 1 mode 2
allows counting of either clock cycles (clock/12 or clock/4) or pulses on pin Tn.
In “Timer” mode, if output toggle enable bit of P2M1.T0OE or P2M1.T1OE is enabled, T0 or T1 output
pin will toggle whenever a timer overflow occurs.
Figure 13-3: Timer/Counter 0 & 1 in Mode 2
13.1.5 Mode 3
Mode 3 has different operating methods for the two timer/counters. For timer/counter 1, mode 3 simply
freezes the counter. Timer/Counter 0, however, configures TL0 and TH0 as two separate 8 bit count
registers in this mode. The logic for this mode is shown in the figure. TL0 uses the Timer/Counter 0
control bits C/T , GATE, TR0, INT0 and TF0. The TL0 can be used to count clock cycles (clock/12 or
clock/4) or 1-to-0 transitions on pin T0 as determined by C/T (TMOD.2). TH0 is forced as a clock cycle
counter (clock/12 or clock/4) and takes over the use of TR1 and TF1 from Timer/Counter 1. Mode 3 is
used in cases where an extra 8 bit timer is needed. With Timer 0 in Mode 3, Timer 1 can still be used
in Modes 0, 1 and 2, but its flexibility is somewhat limited. While its basic functionality is maintained, it
no longer has control over its overflow flag TF1 and the enable bit TR1. Timer 1 can still be used as a
timer/counter and retains the use of GATE and INT1 pin. In this condition it can be turned on and off
by switching it out of and into its own Mode 3. It can also be used as a baud rate generator for the
serial port.
In “Timer” mode, if output toggle enable bit of P2M1.T0OE or P2M1.T1OE is enabled, T0 or T1 output
pin will toggle whenever a timer overflow occurs.
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Publication Release Date: February 21, 2008
Revision A9