W83627EHF_0611 Datasheet, PDF (71/144 Pages) Winbond – WINBOND LPC I/O

W83627EHF/EF, W83627EHG/EG
6.8.39 Fan Divisor Register I - Index 47h (Bank 0)
Register Location:
47h
Power on Default Value:
55h
Attribute:
Read/Write
Size:
8 bits
7 654 32 1 0
FANINC5
FANOPV5
FANINC4
FANOPV4
SYSFANIN DIV_B0
SYSFANIN DIV_B1
CPUFANIN0 DIV_B0
CPUFANIN0 DIV_B1
Bit 7-6: CPUFANIN0 Divisor bit1:0.
Bit 5-4: SYSFANIN Divisor bit1:0.
Bit 3: CPUFANIN1 output value if bit 0 sets to 0. Write 1, pin119(CPUFANIN1) always generates a
logic high signal. Write 0, pin119 always generates a logic low signal. This bit is default 0.
Bit 2: CPUFANIN1 Input Control. Set to 1, pin119 (CPUFANIN1) acts as FAN tachometer input, which
is default value. Set to 0, this pin119 acts as FAN control signal and the output value of FAN
control is set by this register bit 1.
Bit 1: AUXFANIN1 output value if bit 0 sets to 0. Write 1, pin58(AUXFANIN1) always generates a logic
high signal. Write 0, pin58 always generates a logic low signal. This bit is default 0.
Bit 0: AUXFANIN1 Input Control. Set to 1, pin58 (AUXFANIN1) acts as FAN tachometer input, which is
default value. Set to 0, this pin58 acts as FAN control signal and the output value of FAN
control is set by this register bit 1.
Note : Please refer to Bank0 Index 5Dh , Fan divisor table.
6.8.40 Serial Bus Address Register - Index 48h (Bank 0)
Register Location:
48h
Power on Default Value:
2Dh
Attribute:
Read/Write
Size:
8 bits
7 654 32 1 0
Bit 7: Reserved (Read Only).
Bit 6-0: Serial Bus address <7:1>.
Serial Bus Addr.
Reserved
- 65 -
Publication Release Date: Nov. 2006
Revision 1.3