W83627EHF_0611 Datasheet, PDF (53/144 Pages) Winbond – WINBOND LPC I/O

W83627EHF/EF, W83627EHG/EG
Bit 6-0: CPUFANOUT0 PWM Pre-Scale divider. This is the divider of clock source of PWM
output frequency. The maximum divider is 128 (7Fh). This divider should not be set to 0.
01h : divider is 1
02h : divider is 2
03h : divider is 3
:
:
the formula is
PWM output frequency = ^{Input Clock} ∗ ¹
Pre_Scale Divider 256
6.8.6 CPUFANOUT0 Output Value Select Register - Index 03h (Bank 0)
Register Location:
03h
Power on Default Value:
FFh
Attribute:
Read/Write
Size:
8 bits
7 6 5 4 32 1 0
CPUFANOUT0 Value
(1)If CPUFANOUT0 be programmed as PWM output (Bank0 Index 04h.bit1 is 0)
Bit 7-0: CPUFANOUT0 PWM Duty Cycle. Write FFh, CPUFANOUT0 duty cycle is 100%. Write 00h,
CPUFANOUT duty cycle is 0%.
Note. XXh: PWM Duty Cycle output percentage is (XX/256*100%) during one cycle.
(2)If CPUFANOUT0 be programmed as DC Voltage output (Bank0 Index 04h.bit1 is 1)
Bit 7-2: CPUFANOUT0 voltage control.
Bit 1-0: Reserved.
FANOUT
OUTPUT Voltage = AVCC *
64
Note. See the Table 6.4
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Publication Release Date: Nov. 2006
Revision 1.3