W79E225A Datasheet, PDF (38/200 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E225A/227A Data Sheet
The way to enter ISP mode is to set ENP to 1 and write LDSEL properly then force CPU in IDLE
mode, after IDLE mode is released CPU will restart from AP or LD ROM according the value of
LDSEL.
PORT 2
Bit:
7
6
5
4
3
2
1
0
P2.7
P2.6
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0
Mnemonic: P2
Address: A0h
BIT NAME
FUNCTION
7-0 P2
This port functions as an address bus during external memory access, and as a
general-purpose I/O port on devices that incorporate internal program memory.
When P2 functions a non-multiplexed address bus A15-A8 the port latch cannot
be used for general I/O purposes but exists to support the MOVX instructions.
Port 2 data will only be brought out on the P2.7-0 pins during indirect MOVX
instructions.
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
XRAMAH
Bit:
7
-
Mnemonic: XRAMAH
BIT NAME
7-3 -
2-0 A10-8
ALTERNATE FUNCTION
PWM0 output.
PWM1 output.
PWM2 output.
PWM3 output.
PWM4 output.
PWM5 output.
SCL, I2C serial clock.
SDA, I2C serial data.
6
5
4
3
2
1
0
-
-
-
-
A10
A9
A8
Address: A1h
FUNCTION
Reserved.
XRAMAH is used for high byte address memory access through A15-8, when
CPU executes MOVX with R0 (or R1) instructions. Depending EnNVM and
DME0 setting, and address, the memory accessed may differs. Table below
shows the memory access destination.
This device has on-chip sram at 1/2K bytes.
Note: User should take care when accessing the memory with this instruction. Access to invalid
regions may cause undesirable results.
- 38 -
Publication Release Date: December 14, 2007
Revision A2.0