W79E225A Datasheet, PDF (15/200 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E225A/227A Data Sheet
Due to overlapping of AUX-RAM, NVM data memory and external data memory physical address, the
following table is defined. EnNVM bit (NVMCON.5) will enable read access to NVM data memory
area. DME0 (PMR.0) will enable read access to AUX-RAM.
ENNVM
0
0
1
DME0
DATA MEMORY AREA
0
Enable External RAM read/write access by MOVX
1
Enable AUX-RAM read/write access by MOVX
Enable NVM data Memory read access by MOVX only. If EER or
X
EWR is set and NVM flash erase or write control is busy, to set
this bit read NVM data is invalid.
Table 6-1: Bits setting for MOVX access to Data Memory Area
Read
access
Write
access
ENNVM = 1
INSTRUCTIONS
NVM SIZE = SRAM (1K)
MOVX A, @DPTR (Read)
MOVX A, @R0 (Read)
MOVX A, @R1 (Read)
MOVX @DPTR, A (Write)
ADDR ≤ 1K
NVM¹
NVM²
NVM²
NOP
ADDR > 1K
Ext memory¹
NOP
NOP
Ext memory¹
MOVX @R0, A (Write)
NOP
NOP
MOVX @R1, A (Write)
NOP
NOP
Table 6-2: W79E225 MOVX read/write access destination
ENNVM = 1
INSTRUCTIONS
NVM SIZE = SRAM (2K)
Read
access
Write
access
MOVX A, @DPTR (Read)
MOVX A, @R0 (Read)
MOVX A, @R1 (Read)
MOVX @DPTR, A (Write)
MOVX @R0, A (Write)
MOVX @R1, A (Write)
ADDR ≤ 2K
NVM¹
NVM²
NVM²
NOP
NOP
NOP
ADDR > 2K
Ext memory¹
NOP
NOP
Ext memory¹
NOP
NOP
Note:
1. A15~A0=DPTR
2. A15~A8=XRAMAH
Table 6-3: W79E227 MOVX read/write access destination
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Publication Release Date: December 14, 2007
Revision A2.0