W79E225A Datasheet, PDF (3/200 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E225A/227A Data Sheet
17.2.4 Status Register, I2STATUS........................................................................................148
17.2.5 I2C Clock Baud Rate Control, I2CLK..........................................................................148
17.2.6 I2C Time-out Counter, I2Timer ...................................................................................148
17.2.7 I2C Maskable Slave Address .....................................................................................149
17.3 Modes of Operation .................................................................................................... 149
17.3.1 Master Transmitter Mode ...........................................................................................149
17.3.2 Master Receiver Mode ...............................................................................................149
17.3.3 Slave Receiver Mode .................................................................................................150
17.3.4 Slave Transmitter Mode .............................................................................................150
17.4 Data Transfer Flow in Five Operating Modes............................................................. 150
17.4.1 Master/Transmitter Mode ...........................................................................................151
17.4.2 Figure 17-5: Master Transmitter ModeMaster/Receiver Mode ...................................152
17.4.3 Slave/Transmitter Mode .............................................................................................153
17.4.4 Slave/Receiver Mode .................................................................................................154
17.4.5 GC Mode ....................................................................................................................155
18. SERIAL PERIPHERAL INTERFACE (SPI)............................................................................. 156
18.1 General descriptions................................................................................................... 156
18.2 Block descriptions ....................................................................................................... 156
18.3 Functional descriptions ............................................................................................... 158
18.3.1 Master mode ..............................................................................................................158
18.3.2 Slave Mode ................................................................................................................161
18.3.3 Slave select ................................................................................................................165
18.3.4 /SS output...................................................................................................................165
18.3.5 SPI I/O pins mode ......................................................................................................166
18.3.6 Programmable serial clock’s phase and polarity ........................................................167
18.3.7 Receive double buffered data register........................................................................168
18.3.8 LSB first enable ..........................................................................................................169
18.3.9 Write Collision detection .............................................................................................169
18.3.10 Transfer complete interrupt ......................................................................................169
18.3.11 Mode Fault ...............................................................................................................169
19. ANALOG-TO-DIGITAL CONVERTER .................................................................................... 172
19.1 Operation of ADC ....................................................................................................... 172
19.2 ADC Resolution and Analog Supply ........................................................................... 173
20. TIMED ACCESS PROTECTION ............................................................................................ 174
21. PORT 4 STRUCTURE ............................................................................................................ 176
22. IN-SYSTEM PROGRAMMING................................................................................................ 179
22.1 The Loader Program Locates at LDFlash Memory .................................................... 179
22.2 The Loader Program Locates at APFlash Memory .................................................... 179
23. OPTION BITS ......................................................................................................................... 180
23.1 Config0........................................................................................................................ 180
23.2 Config1........................................................................................................................ 181
24. ELECTRICAL CHARACTERISTICS....................................................................................... 182
24.1 Absolute Maximum Ratings ........................................................................................ 182
Publication Release Date: December 14, 2007
-3-
Revision A2.0