W79E225A Datasheet, PDF (37/200 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E225A/227A Data Sheet
Continued
BIT NAME
6
EWR
5 EnNVM
4~1
-
0
NVMF
FUNCTION
Set this bit is write data to NVM data memory by NVMADDRH and
NVMADDRL to decode NVM data memory. If finished, NVMF flag will be set to
“1”, and then this bit will be cleared. If NVMF flag is set, the erase and write
NVM are invalid.
To enable read NVM data memory area, refer as below table.
0: To disable the MOVX instruction to read NVM data memory.
1: To enable the MOVX instruction to read NVM data memory, the External
RAM or AUX-RAM will be disabled.
Reserved.
NVM data memory erases or writes finished flag.
If NVM data memory is finished by erase or write, it will be set to “1” by
hardware and clear by software. And it will be interrupted when NVM
erase/write interrupt is enabled.
ISP CONTROL REGISTER
Bit:
7
6
5
4
3
2
1
0
SWRST/
HWB
-
LD/AP
-
-
-
LDSEL ENP
Mnemonic: CHPCON
Address: 9Fh
BIT NAME
7
W:SWRST
R:HWB
6-
5
LD/AP
(read-only)
4-2 -
1
LDSEL
(write-only)
0 ENP
FUNCTION
Write access to this bit is different from read access.
Write this bit to 1 to force the microcontroller to reset to the initial condition,
just like power-on reset. This action re-boots the microcontroller and starts
normal operation. This bit will be cleared during the reset.
Read this bit to determine whether or not a hardware reboot is in progress. If
CPU is rebooted by P3.6 & P3.7 or P4.3, this bit is set to 1 after the hardware
reboot.
Note: P4.3 pin is available in 48L LQFP package only.
Reserved.
0: CPU is executing AP Flash EPROM
1: CPU is executing LD Flash EPROM
Reserved.
Loader Program Location Selection. This bit should be set before entering ISP
mode.
0: The executing program is in the 64-KB AP Flash EPROM. The 4-KB LD
Flash EPROM is the destination for re-programming.
1: The executing program is in the 4-KB memory bank. The 64-KB AP Flash
EPROM is the destination for re-programming.
FLASH EPROM Programming Enable.
1: Enable in-system programming mode. In this mode, erase, program and
read operations are achieved.
0: Disable in-system programming mode. The on-chip flash memory is read-
only.
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Publication Release Date: December 14, 2007
Revision A2.0