W79E225A Datasheet, PDF (150/200 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E225A/227A Data Sheet
17.3.3 Slave Receiver Mode
Serial data and the serial clock are received through SDA and SCL. After each byte is received, an
acknowledge bit is transmitted. START and STOP conditions are recognized as the beginning and
end of a serial transfer. Address recognition is performed by hardware after reception of the slave
address and direction bit.
17.3.4 Slave Transmitter Mode
The first byte is received and handled as in the slave receiver mode. However, in this mode, the
direction bit will indicate that the transfer direction is reversed. Serial data is transmitted via SDA while
the serial clock is input through SCL. START and STOP conditions are recognized as the beginning
and end of a serial transfer.
17.4 Data Transfer Flow in Five Operating Modes
The five operating modes are: Master/Transmitter, Master/Receiver, Slave/Transmitter,
Slave/Receiver and GC Call. Bits STA, STO and AA in I2CON register will determine the next state of
the SIO hardware after SI flag is cleared. Upon complexion of the new action, a new status code will
be updated and the SI flag will be set. If the I2C interrupt control bits (EA and EI2) are enabled,
appropriate action or software branch of the new status code can be performed in the Interrupt service
routine.
Data transfers in each mode are shown in the following figures.
Figure 17-4: Legend for I2C flow charts
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Publication Release Date: December 14, 2007
Revision A2.0