W79E225A Datasheet, PDF (13/200 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E225A/227A Data Sheet
6. MEMORY ORGANIZATION
The W79E225/227 separates the memory into two sections; Program Memory and Data Memory.
Program Memory stores instruction op-codes, while Data Memory stores data or memory-mapped
devices.
6.1 Program Memory (on-chip Flash)
W79E225/227 includes one 16/64K bytes of main FLASH EPROM for application program (AP FLASH
EPROM) and one 4K bytes of FLASH EPROM for loader program (LD FLASH EPROM) to operate the
in-system programming (ISP) feature, and one 1/2K bytes of NVM Flash EPROM for data storage.
The 16/64K bytes Flash EPROM is AP0 bank. The default active bank is AP0.
In normal operation, the microcontroller will execute the code from main FLASH EPROM. By setting
program registers, user can force the microcontroller to switch to programming mode which will cause
it to execute the code (loader program) from the 4K bytes of auxiliary LD FLASH EPROM to update
the contents of the 16/64K bytes of main FLASH EPROM. After reset, the microcontroller will executes
the new application program in the main FLASH EPROM. This ISP feature makes the job easy and
efficient in which the application needs to update firmware frequently without opening the chassis.
6.2 Data Memory
W79E225/227 can access up to 64Kbytes of external Data Memory. This memory region is accessed
by the MOVX instructions. Unlike the 8051 derivatives, W79E225/227 contains on-chip 1/2 Kbytes of
Data Memory, which only can be accessed by MOVX instructions. These 1/2 Kbytes of SRAM is
between address 0000h and 03FFH/07FFH. Access to the on-chip Data Memory is optional under
software control. When enabled by DMEO bit of PMR register, a MOVX instruction that uses this area
will go to the on-chip RAM. If MOVX instruction accesses the addresses greater than 03FFH/07FFH
CPU will automatically access external memory through Port 0 and 2. When disabled, the 1/2 KB
memory area is transparent to the system memory map. Any MOVX directed to the space between
0000h and FFFFH goes to the expanded bus on the Port 0 and 2. This is the default condition. In
addition, the device has the standard 256 bytes of on-chip RAM. This can be accessed either by direct
addressing or by indirect addressing. There are also some Special Function Registers (SFRs), which
can only be accessed by direct addressing.
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Publication Release Date: December 14, 2007
Revision A2.0