W79E225A_08 Datasheet, PDF (3/203 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E225A/226A/227A Data Sheet
17.2.4 Status Register, I2STATUS........................................................................................151
17.2.5 I2C Clock Baud Rate Control, I2CLK..........................................................................151
17.2.6 I2C Time-out Counter, I2Timer ...................................................................................151
17.2.7 I2C Maskable Slave Address .....................................................................................152
17.3 Modes of Operation .................................................................................................... 152
17.3.1 Master Transmitter Mode ...........................................................................................152
17.3.2 Master Receiver Mode ...............................................................................................152
17.3.3 Slave Receiver Mode .................................................................................................153
17.3.4 Slave Transmitter Mode .............................................................................................153
17.4 Data Transfer Flow in Five Operating Modes............................................................. 153
17.4.1 Master/Transmitter Mode ...........................................................................................154
17.4.2 Figure 17-5: Master Transmitter ModeMaster/Receiver Mode ...................................155
17.4.3 Slave/Transmitter Mode .............................................................................................156
17.4.4 Slave/Receiver Mode .................................................................................................157
17.4.5 GC Mode ....................................................................................................................158
18. SERIAL PERIPHERAL INTERFACE (SPI)............................................................................. 159
18.1 General descriptions................................................................................................... 159
18.2 Block descriptions ....................................................................................................... 159
18.3 Functional descriptions ............................................................................................... 161
18.3.1 Master mode ..............................................................................................................161
18.3.2 Slave Mode ................................................................................................................164
18.3.3 Slave select ................................................................................................................168
18.3.4 /SS output...................................................................................................................168
18.3.5 SPI I/O pins mode ......................................................................................................169
18.3.6 Programmable serial clock’s phase and polarity ........................................................170
18.3.7 Receive double buffered data register........................................................................171
18.3.8 LSB first enable ..........................................................................................................172
18.3.9 Write Collision detection .............................................................................................172
18.3.10 Transfer complete interrupt ......................................................................................172
18.3.11 Mode Fault ...............................................................................................................172
19. ANALOG-TO-DIGITAL CONVERTER .................................................................................... 175
19.1 Operation of ADC ....................................................................................................... 175
19.2 ADC Resolution and Analog Supply ........................................................................... 176
20. TIMED ACCESS PROTECTION ............................................................................................ 177
21. PORT 4 STRUCTURE ............................................................................................................ 179
22. IN-SYSTEM PROGRAMMING................................................................................................ 182
22.1 The Loader Program Locates at LDFlash Memory .................................................... 182
22.2 The Loader Program Locates at APFlash Memory .................................................... 182
23. OPTION BITS ......................................................................................................................... 183
23.1 Config0........................................................................................................................ 183
23.2 Config1........................................................................................................................ 184
24. ELECTRICAL CHARACTERISTICS....................................................................................... 185
24.1 Absolute Maximum Ratings ........................................................................................ 185
Publication Release Date: April 15, 2008
-3-
Revision A4.0