W79E225A_08 Datasheet, PDF (173/203 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E225A/226A/227A Data Sheet
damage. The mode fault mechanism attempts to protect the device by disabling the drivers. The
MSTR and SPE control bits in the SPCR associated with the SPI are cleared by hardware and an
interrupt is generated subject to masking by the ESPI control bit.
Other precautions may need to be taken to prevent driver damage. If two devices are made masters at
the same time, mode fault does not help protect either one unless one of them selects the other as
slave. The amount of damage possible depends on the length of time both devices attempt to act as
master.
MODF bit is set automatically by SPI hardware, if the MSTR control bit is set and the slave select input
pin becomes 0. This condition is not permitted in normal operation. In the case where /SS is set, it is
an output pin rather than being dedicated as the /SS input for the SPI system. In this special case, the
mode fault function is inhibited and MODF remains cleared. This flag is cleared by software.
The following shows the sample hardware connection and s/w flow for multi-master/slave
environment. It shows how s/w handles mode fault.
Figure 18-12: SPI multi-master slave environment
- 173 -
Publication Release Date: April 15, 2008
Revision A4.0