W9864G6DB Datasheet, PDF (16/48 Pages) Winbond – 1M x 4 BANKS x 16 BITS SDRAM

W9864G6DB
9. AC CHARACTERISTICS
(VDD = 3.6V − 2.7V, V_SS = 0V, TA = 0 to 70 °C) (Notes: 5, 6.)
PARAMETER
Ref/Active to Ref/Active Command Period
Active to Precharge Command Period
Active to Read/Write Command Delay Time
Read/Write(a) to Read/Write(b)Command Period
Precharge to Active(b) Command Period
Active(a) to Active(b) Command Period
Write Recovery Time
CL* = 2
CL* = 3
CLK Cycle Time
CL* = 2
CL* = 3
CLK High Level
CLK Low Level
Access Time from CLK
CL* = 2
CL* = 3
Output Data Hold Time
Output Data High Impedance Time
Output Data Low Impedance Time
Power Down Mode Entry Time
Transition Time of CLK (Rise and Fall)
Data-in-Set-up Time
Data-in Hold Time
Address Set-up Time
Address Hold Time
CKE Set-up Time
CKE Hold Time
Command Set-up Time
Command Hold Time
Refresh Time
Mode Register Set Cycle Time
SYMBOL
tRC
tRAS
tRCD
tCCD
tRP
tRRD
tWR
tCK
tCH
tCL
tAC
tOH
tHZ
tLZ
tSB
tT
tDS
tDH
tAS
tAH
tCKS
tCKH
tCMS
tCMH
tREF
tRSC
MIN.
65
45
20
1
20
14
8
7
8
7
2
2
3
3
0
0
0.5
1.5
1
1.5
1
1.5
1
1.5
1
14
-7
MAX.
100000
1000
1000
6
5.5
7
7
10
64
UNIT
nS
Cycle
nS
mS
nS
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