TM4C1294NCZAD Datasheet, PDF (952/1914 Pages) Texas Instruments – Tiva Microcontroller

External Peripheral Interface (EPI)
Register 46: EPI Host-Bus PSRAM (EPIHBPSRAM), offset 0x360
This register holds the PSRAM configuration register value. When the WRCRE bit in the EPIHB16CFGn
register is set, all 21 bits of the EPIHBPSRAM register's CR value are written to the PSRAM's
configuration register. When the RDCRE bit is set in the EPIHB16CFGn register, a read of the
PSRAM's configuration register takes place and the value is written to bits[15:0] of the EPIHBPSRAM.
Bits[20:16] will not contain any valid data.
EPI Host-Bus PSRAM (EPIHBPSRAM)
Base 0x400D.0000
Offset 0x360
Type RW, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
CR
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CR
Type RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:21
20:0
Name
reserved
CR
Type
RO
RW
Reset Description
0x000
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x000000
PSRAM Config Register
During a configuration write, all 21 bits of the CR bit field are written to
the PSRAM. During configuration reads, CR bits[15:0] of this register
contain the configuration read of the PSRAM. CR[20:16] will not
contain valid data.
952
June 18, 2014
Texas Instruments-Production Data