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TM4C1294NCZAD Datasheet, PDF (220/1914 Pages) Texas Instruments – Tiva Microcontroller
JTAG Interface
4.5.2.5
4.5.2.6
DPACC Data Register
The format for the 35-bit DPACC Data Register defined by ARM is described in the ARM® Debug
Interface V5 Architecture Specification.
ABORT Data Register
The format for the 35-bit ABORT Data Register defined by ARM is described in the ARM® Debug
Interface V5 Architecture Specification.
220
June 18, 2014
Texas Instruments-Production Data