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NS32FV16 Datasheet, PDF (95/104 Pages) Texas Instruments – Advanced Imaging/Communication Signal Processors
Appendix B Instruction Execution Times (Continued)
TEX Calculation
TEX Calculation
Operand 1 is in a register operand 2 is in memory This
means that we have to use the table values for the kFMl
case
The following parameter values are obtained from Table B-2
and the equations in the previous sections
TEA2 (Absolute Mode) e 4
TOPD (Memory Write) e 7 (Operand aligned no waits)
Operand 1 and operand 2 are both in memory Therefore
the table values for the kMMl case must be used
The parameter values obtained from Table B-2 and the
equations in the previous sections are as follows
TEA1 (Register Relative Mode) e 5
TEA2 (Memory Relative Mode) e 8 a TOPD e 15
(TOPD e 7 (Operand Aligned No Wait))
Tf e 4
TOPD1 (Read from GEN1) e 7 a 2 e 9 (Operand
TCY e 32
Aligned One Wait)
TPR e TEA2 a 6 e 4 a 6 e 10
From the FPU Execution Timing table in the NS32181 data
sheet we get a TFPU for MOVLF of 19 clock cycles
TOPD2 (RMW from GEN2) e 11 a 6 e 17 (Operand Una-
ligned Two Waits)
Tf e 4
The higher value between TPR and TFPU a 3 is 22 The
total execution time in clock cycles is
TEX e TEA2 a TOPD a TF a TCY a 22 e 65
EXAMPLE 2
Calculate TEX for the instruction MULF 20(R0) 4(10(FP))
Assumptions
 The FPU being used is the NS32181
 20(R0) is an aligned read with one wait state
te  10(FP) is an aligned read with no wait states
 4(10 (FP)) is an unaligned rmw with two wait states
x TCY e 22
28
TPR e 0
From the FPU Execution Timing Table in the NS32181 data
sheet we get a TFPU for MULF of 33 clock cycles
The higher value between TPR and TFPU a 3 is 36 The
total execution time in clock cycles is
TEX e TEA1aTEA2aTOPD1aTOPD2a3TfaTCYa
x x 36e5a15a9a17a(22 28)a36e133 140
TABLE B-1 Basic Instructions
Mnemonic
TEA1
TEA2
TOPB
TOPW
TOPD
TOPi
L
TCY
Notes
le ABSi
1
1
1
1
2
9
SCR k 0
2
8
SCR l 0
ACBi
1
1
2
16
kMl no branch
2
15%20
kMl branch
18
kRl no branch
17%22
kRl branch
o ADDi
1
1
1
3
3
kxMl
1
4
kMRl
4
kRRl
ADDCi
1
1
1
3
3
kxMl
1
4
kMRl
4
kRRl
s ADDPi
1
1
1
1
3
16
No Carry
3
18
Carry
ADDQi
1
2
6
kMl
4
kRl
b ADDR
1
1
1
1
2
kxMl
3
kxRl
ADJSPi
1
1
6
O ANDi
1
1
1
3
3
kxMl
1
4
kMRl
4
kRRl
ASHi
1
1
1
2
14 x 45
Bcond
7
6%10
no branch
branch
BICi
1
1
1
3
3
kxMl
1
4
kMRl
4
kRRl
94