TLK2711-SP_15 Datasheet, PDF (9/29 Pages) Texas Instruments – 1.6-Gbps to 2.5-Gbps Class V Transceiver

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TLK2711-SP
SGLS307N – JULY 2006 – REVISED DECEMBER 2015
7.6 Transmitter/Receiver Electrical Characteristics
PARAMETER
TEST CONDITIONS
V_OD(p)
Preemphasis VOD, direct,
V_OD(p) = |VTXP – VTXN|
Rt = 50 Ω, PREM = high, DC coupled,
See Figure 3
Rt = 50 Ω, PREM = low, DC coupled,
See Figure 3
V_{OD(pp_p)}
Differential, peak-to-peak output voltage with
preemphasis
Rt = 50 Ω, PREM = high, DC coupled,
See Figure 3
Rt = 50 Ω, PREM = low, DC coupled,
See Figure 3
V_OD(d)
V_{OD(pp_d)}
Deemphais output voltage,
|V_TXP – V_TXN|
Differential, peak-to-peak output voltage with
deemphasis
Rt = 50 Ω, DC coupled, See Figure 3
Rt = 50 Ω, DC coupled, See Figure 3
V_(cmt)
V_ID
V_(cmr)
I_lkg
C_I
Transmit common mode voltage range, (V_TXP
+ V_TXN) / 2
Rt = 50 Ω, See Figure 3
Receiver input voltage differential,
|V_RXP – V_RXN|
See ⁽¹⁾
Receiver common mode voltage range, (V_RXP
+ V_RXN) / 2
See ⁽¹⁾
Receiver input leakage current
Receiver input capacitance
Serial data total jitter (peak to peak)
Differential output jitter at 2.5 Gbps,
Random + deterministic, PRBS pattern
Differential output jitter at 1.6 Gbps,
Random + deterministic, PRBS pattern
t_t, t_f
Differential output signal rise, fall time
(20% to 80%)
RL = 50 Ω, CL = 5 pF, See Figure 3
Jitter tolerance eye closure
Differential input jitter, random + deterministic,
PRBS pattern at zero crossing⁽¹⁾
t_{d(Tx latency)}
t_{d(Rx latency)}
Tx latency
Rx latency
See Figure 8
See Figure 11
(1) Nonproduction tested parameters
(2) UI is the time interval of one serialized bit.
MIN
655
590
1310
1180
540
1080
1000
220
1000
–10
0.4
34
76
TYP
800
740
1600
1480
650
1300
1250
1250
4
0.28
0.32
150
MAX
1100
1050
UNIT
mV
2200
2100
mV_p-p
950 mV
1900 mV_p-p
1450 mV
1600 mV
2250 mV
10 µA
pF
UI ⁽²⁾
ps
UI
38 bits
107 bits
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