TLK2711-SP_15 Datasheet, PDF (18/29 Pages) Texas Instruments – 1.6-Gbps to 2.5-Gbps Class V Transceiver

TLK2711-SP
SGLS307N – JULY 2006 – REVISED DECEMBER 2015
www.ti.com
8.3.13 LOS Detection
The TLK2711-SP has a LOS detection circuit for conditions where the incoming signal no longer has a sufficient
voltage level to keep the clock recovery circuit in lock. The signal detection circuit is intended to be an indication
of gross signal error conditions, such as a detached cable or no signal being transmitted, and not an indication of
signal coding health. The TLK2711-SP reports this condition by asserting RKLSB, RKMSB, and RXD0 to RXD15
pins to a high state. As long as the differential signal is above 200 mV in differential magnitude, the LOS circuit
does not signal an error condition. When the device is disabled (ENABLE = L), RKMSB will output the status of
LOS. Active low = LOS detected.
8.3.14 PRBS Verification
The TLK2711-SP also has a built-in BERT function in the receiver side that is enabled by the PRBSEN. It can
check for errors and report the errors by forcing the RKLSB pin low.
8.3.15 Reference Clock Input
The reference clock (TXCLK) is an external input clock that synchronizes the transmitter interface. The reference
clock is then multiplied in frequency 10× to produce the internal serialization bit clock. The internal serialization
bit clock is frequency locked to the reference clock and used to clock out the serial transmit data on both its
rising and falling edges, providing a serial data rate that is 20× the reference clock.
8.3.16 Operating Frequency Range
The TLK2711-SP operates at a serial data rate from 1.6 to 2.5 Gbps. To achieve these serial rates, TXCLK must
be within 80 to 125 MHz. The TXCLK must be within ±100 PPM of the desired parallel data rate clock.
8.3.17 Testability
The TLK2711-SP has a comprehensive suite of built-in self-tests. The loopback function provides for at-speed
testing of the transmit/receive portions of the circuitry. The enable pin allows for all circuitry to be disabled so that
a quiescent current test can be performed. The PRBS function allows for built-in self-test (BIST).
8.3.18 Loopback Testing
The transceiver can provide a self-test function by enabling (LOOPEN) the internal loopback path. Enabling this
pin causes serial-transmitted data to be routed internally to the receiver. The parallel data output can be
compared to the parallel input data for functional verification. The external differential output is held in a high-
impedance state during the loopback testing.
8.3.19 BIST
The TLK2711-SP has a BIST function. By combining PRBS with loopback, an effective self-test of all the circuitry
running at full speed can be realized. The successful completion of the BIST is reported on the RKLSB pin.
8.3.20 Power-On Reset
Upon application of minimum valid power and valid GTX_CLK with device enabled (ENABLE = HIGH), the
TLK2711-SP generates a power-on reset. During the power-on reset the RXD0 to RXD15, RKLSB, and RKMSB
signal pins go to a high-impedance state. The RXCLK is held low. LCKREFN must be deasserted (logic high
state) with active transitions on the receiver during the power-on reset period. Active transitions on receiver can
be accomplished with transitions on RXP/N or by assertion of LOOPEN. For TX-only applications, LOOPEN and
LCKREFN can be driven logic high together. The receiver circuit requires this to properly reset. After power-up
reset period, LCKREFN can be asserted for transmit only applications. The length of the power-on reset cycle
depends on the TXCLK frequency, but is less than 1 ms. See Figure 12 . TI recommends that the receiver be
reset immediately after power up. In some conditions, it is possible for the receiver circuit to power up in state
with internal contention.
If LCKREFN cannot be deasserted high during or for the complete power-on reset period, it can be deasserted
high at the end of or after the power-on reset period for minimum of 1 µS with active transitions on receiver to
properly complete reset of receiver.
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