TLK2711-SP_15 Datasheet, PDF (8/29 Pages) Texas Instruments – 1.6-Gbps to 2.5-Gbps Class V Transceiver

TLK2711-SP
SGLS307N – JULY 2006 – REVISED DECEMBER 2015
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
V_DD
Supply voltage
I_CC
Supply current
P_D
Power dissipation
Shutdown current
PLL startup lock time
Data acquisition time
T_c
Operating case temperature
Frequency range 1.6 Gbps to 2 Gbps
Frequency range 1.6 Gbps to 2.5 Gbps
Frequency = 1.6 Gbps, PRBS pattern
Frequency = 2.5 Gbps, PRBS pattern
Frequency = 1.6 Gbps, PRBS pattern
Frequency = 2.5 Gbps, PRBS pattern
Frequency = 2.5 Gbps, PRBS pattern
Enable = 0, V_DDA, V_DD pins, V_DD = MAX
V_DD, V_DDC = 2.375 V
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MIN
2.375
2.5
–55
NOM
2.5
2.6
110
160
275
400
3
0.1
1024
MAX
2.625
2.7
UNIT
V
mA
mW
550
mA
0.4 ms
bits
125 °C
7.4 Thermal Information
see ⁽¹⁾
THERMAL METRIC⁽²⁾
TLK2711-SP
HFG (CFP)
UNIT
68 PINS
R_θJA
R_θJC
Junction-to-ambient thermal resistance
Junction-to-case thermal resistance
31.5
°C/W
2.96
°C/W
(1) This CFP package has built-in vias that electrically and thermally connect the bottom of the die to a pad on the bottom of the package.
To efficiently remove heat and provide a low-impedance ground path, a thermal land is required on the surface of the PCB directly
underneath the body of the package. During normal surface mount flow solder operations, the heat pad on the underside of the package
is soldered to this thermal land creating an efficient thermal path. Normally, the PCB thermal land has a number of thermal vias within it
that provide a thermal path to internal copper areas (or to the opposite side of the PCB) that provide for more efficient heat removal. TI
typically recommends an 11.9-mm × 11.9-mm board-mount thermal pad with a 4.2-mm × 4.2-mm solder mask defined pad attach
opening. This allows maximum area for thermal dissipation, while allowing leads pad to solder pad clearance. A sufficient quantity of
thermal or electrical vias must be included to keep the device within Recommended Operating Conditions. This pad must be electrically
ground potential.
(2) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
7.5 TTL Input Electrical Characteristics
over recommended operating conditions (unless otherwise noted),
TTL signals: TXD0–TXD15, TXCLK, LOOPEN, LCKREFN, ENABLE, PRBS_EN, TKLSB, TKMSB, PRE
PARAMETER
TEST CONDITIONS
MIN TYP
V_IH High-level input voltage
V_IL
Low-level input voltage
I_IH
Input high current
I_IL
Input low current
C_I
Receiver input capacitance
t_r
Rise time, TXCLK, TKMSB, TKLSB, TXD0 to TXD15
See Figure 1
See Figure 1
V_DD = MAX, V_IN = 2 V
V_DD = MAX, V_IN = 0.4 V
0.7 to 1.9 V, C = 5 pF,
See Figure 1
1.7
–40
6
1
t_f
Fall time, TXCLK, TKMSB, TKLSB, TXD0 to TXD15
t_su
TXD0 to TXD15, TKMSB, TKLSB setup to ↑ TXCLK
t_h
TXD, TKMSB, TKLSB hold to ↑ TXCLKS
1.9 to 0.7 V, C = 5 pF,
See Figure 1
See Figure 1 ⁽¹⁾
See Figure 1 ⁽¹⁾
1
1.5
0.4
(1) Nonproduction tested parameters
MAX
0.8
40
UNIT
V
V
µA
µA
pF
ns
ns
ns
ns
8
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