TLK2711-SP_15 Datasheet, PDF (10/29 Pages) Texas Instruments – 1.6-Gbps to 2.5-Gbps Class V Transceiver

TLK2711-SP
SGLS307N – JULY 2006 – REVISED DECEMBER 2015
7.7 Reference Clock (TXCLK) Timing Requirements
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Frequency
Receiver data rate / 20
Frequency tolerance
Duty cycle
Jitter
Peak to peak
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MIN
–100
–100
40%
NOM
50%
MAX
100
100
60%
40
UNIT
ppm
ppm
ps
7.8 TTL Output Switching Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
V_OH
V_OL
t_r(slew)
High-level output voltage
Low-level output voltage
Slew rate (rising), magnitude of RXCLK, RKLSB,
RKMSB, RXD0 to RXD15
I_OH = –2 mA, V_DD = MIN
I_OL = 2 mA, V_DD = MIN
0.8 V to 2 V, C = 5 pF, See Figure 2
t_f(slew) Slew rate (falling), magnitude of RXCLK, RKLSB,
RKMSB, RXD0 to RXD15
0.8 V to 2 V, C = 5 pF, See Figure 2
t_su
RXD0 to RXD15, RKMSB, RKLSB setup to ↑
RXCLK
50% voltage swing, TXCLK = 80 MHz,
See Figure 2 ⁽¹⁾
50% voltage swing, TXCLK = 125 MHz,
See Figure 2 ⁽¹⁾
50% voltage swing, TXCLK = 80 MHz,
See Figure 2 ⁽¹⁾
t_h
RXD0 to RXD15, RKMSB, RKLSB hold to ↑ RXCLK
50% voltage swing, TXCLK = 125 MHz,
See Figure 2 ⁽¹⁾
(1) Nonproduction tested parameters
MIN TYP MAX UNIT
2.1 2.3
V
0.25 0.5 V
0.5
V/ns
0.5
V/ns
3
ns
2.5
3
ns
2
TXCLK
t_r
TKLSB, TKMSB,
TXD0−TXD15
t_f
t_su
t_h
t_f
t_r
3.6 V
2V
0.8 V
0V
3.6 V
2V
0.8 V
0V
Figure 1. TTL Data Input Valid Levels for AC Measurements
10
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