TLK2711-SP_15 Datasheet, PDF (5/29 Pages) Texas Instruments – 1.6-Gbps to 2.5-Gbps Class V Transceiver

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6 Pin Configuration and Functions
HFG Package
68-Pin CFP
Top View
TLK2711-SP
SGLS307N – JULY 2006 – REVISED DECEMBER 2015
V_DD
TXD3
TXD4
TXD5
GND
TXD6
TXD7
GTX_CLK
V_DD
TXD8
TXD9
TXD10
GND
TXD11
TXD12
TXD13
GND
68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52
1
51
2
50
3
49
4
48
5
47
6
46
7
45
8
44
9
43
10
42
11
41
12
40
13
39
14
38
15
37
16
36
17
35
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
GND
V_DD
RXD3
RXD4
RXD5
RXD6
GND
RXD7
RX_CLK
RXD8
RXD9
V_DD
RXD10
RXD11
RXD12
RXD13
GND
Pin Functions
PIN
I/O
NAME
NO.
DESCRIPTION
Serial transmit outputs. TXP and TXN are differential serial outputs that interface to copper or an
DOUTTXN
DOUTTXP
63
64
O
optical I/F module. These pins transmit NRZ data at a rate of 20× the TXCLK value. TXP and TXN
are put in a high-impedance state when LOOPEN is high and are active when LOOPEN is low.
During power-on reset, these pins are high impedance.
ENABLE
Device enable. When this pin is held low, the device is placed in power-down mode. Only the signal
25
I ⁽¹⁾
detect circuit on the serial receive pair is active. When in power-down mode, RKMSB will output the
status of signal detect circuit (LOS). When asserted high while the device is in power-down mode,
the transceiver is reset before beginning normal operation.
GND
5, 13, 17, 19,
29, 34, 35,
45, 51, 55,
—
Analog and digital logic ground. Provides a ground for the logic circuits, digital I/O buffers, and the
high-speed analog circuits.
58, 62, 65
LCKREFN
Lock to reference. When LCKREFN is low, the receiver clock is frequency locked to TXCLK. This
places the device in a transmit-only mode since the receiver is not tracking the data. When
LCKREFN is asserted low, the receive data bus pins (RXD0 through RXD15, RXCLK, RKLSB, and
26
I ⁽¹⁾
RKMSB) are in a high-impedance state if device is enabled (ENABLE = H). If device is disabled
(ENABLE = L), then RKMSB will output the status of the LOS detector (active low = LOS). All other
receive outputs will remain high-impedance.
When LCKREFN is deasserted high, the receiver is locked to the received data stream. LCKREFN
must be deasserted to a high state during power-on reset. See Power-On Reset.
(1) Internal 10-kΩ pullup
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