LM3S2793 Datasheet, PDF (859/1194 Pages) Texas Instruments – Stellaris® LM3S2793 Microcontroller

Stellaris^® LM3S2793 Microcontroller
Register 4: I²S Transmit FIFO Limit (I2STXLIMIT), offset 0x00C
This register sets the lower FIFO limit at which a FIFO service request is issued.
I2S Transmit FIFO Limit (I2STXLIMIT)
Base 0x4005.4000
Offset 0x00C
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
LIMIT
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:5
4:0
Name
reserved
LIMIT
Type
RO
R/W
Reset Description
0x0000.00 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00
FIFO Limit
This field sets the FIFO level at which a FIFO service request is issued,
generating an interrupt or a µDMA transfer request.
The transmit FIFO generates a service request when the number of
items in the FIFO is less than the level specified by the LIMIT field. For
example, if the LIMIT field is set to 8, then a service request is
generated when there are less than 8 samples remaining in the transmit
FIFO.
January 20, 2012
859
Texas Instruments-Production Data