LM3S2793 Datasheet, PDF (539/1194 Pages) Texas Instruments – Stellaris® LM3S2793 Microcontroller

Stellaris^® LM3S2793 Microcontroller
Register 28: EPI Write FIFO Count (EPIWFIFOCNT), offset 0x204
This register contains the number of slots currently available in the WFIFO. This register may be
used for polled writes to avoid stalling and for blocking reads to avoid excess stalling (due to
undrained writes). An example use for writes may be:
for (idx = 0; idx < cnt; idx++) {
while (EPIWFIFOCNT == 0) ;
*ext_ram = *mydata++;
}
The above code ensures that writes to the address mapped location do not occur unless the WFIFO
has room. Although polling makes the code wait (spinning in the loop), it does not prevent interrupts
being serviced due to bus stalling.
EPI Write FIFO Count (EPIWFIFOCNT)
Base 0x400D.0000
Offset 0x204
Type RO, reset 0x0000.0004
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
WTAV
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
Bit/Field
31:3
2:0
Name
reserved
WTAV
Type
Reset Description
RO 0x0000.000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RO
0x4
Available Write Transactions
The number of write transactions available in the WFIFO.
When clear, a write is stalled waiting for a slot to become free (from a
preceding write completing).
January 20, 2012
539
Texas Instruments-Production Data