LM3S2793 Datasheet, PDF (23/1194 Pages) Texas Instruments – Stellaris® LM3S2793 Microcontroller

Stellaris^® LM3S2793 Microcontroller
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
Register 31:
Register 32:
Register 33:
Register 34:
GPIO Interrupt Both Edges (GPIOIBE), offset 0x408 ........................................................ 434
GPIO Interrupt Event (GPIOIEV), offset 0x40C ................................................................ 435
GPIO Interrupt Mask (GPIOIM), offset 0x410 ................................................................... 436
GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 437
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 438
GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 440
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 441
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 443
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 444
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 445
GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 446
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 447
GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 449
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 451
GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 452
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 454
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 455
GPIO Analog Mode Select (GPIOAMSEL), offset 0x528 ................................................... 457
GPIO Port Control (GPIOPCTL), offset 0x52C ................................................................. 459
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 461
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 462
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 463
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 464
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 465
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 466
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 467
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 468
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 469
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 470
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 471
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 472
External Peripheral Interface (EPI) ............................................................................................. 473
Register 1: EPI Configuration (EPICFG), offset 0x000 ....................................................................... 505
Register 2: EPI Main Baud Rate (EPIBAUD), offset 0x004 ................................................................. 506
Register 3: EPI SDRAM Configuration (EPISDRAMCFG), offset 0x010 .............................................. 508
Register 4: EPI Host-Bus 8 Configuration (EPIHB8CFG), offset 0x010 ............................................... 510
Register 5: EPI Host-Bus 16 Configuration (EPIHB16CFG), offset 0x010 ........................................... 513
Register 6: EPI General-Purpose Configuration (EPIGPCFG), offset 0x010 ........................................ 517
Register 7: EPI Host-Bus 8 Configuration 2 (EPIHB8CFG2), offset 0x014 .......................................... 522
Register 8: EPI Host-Bus 16 Configuration 2 (EPIHB16CFG2), offset 0x014 ....................................... 524
Register 9: EPI General-Purpose Configuration 2 (EPIGPCFG2), offset 0x014 ................................... 526
Register 10: EPI Address Map (EPIADDRMAP), offset 0x01C ............................................................. 527
Register 11: EPI Read Size 0 (EPIRSIZE0), offset 0x020 .................................................................... 529
Register 12: EPI Read Size 1 (EPIRSIZE1), offset 0x030 .................................................................... 529
Register 13: EPI Read Address 0 (EPIRADDR0), offset 0x024 ............................................................ 530
Register 14: EPI Read Address 1 (EPIRADDR1), offset 0x034 ............................................................ 530
Register 15: EPI Non-Blocking Read Data 0 (EPIRPSTD0), offset 0x028 ............................................. 531
Register 16: EPI Non-Blocking Read Data 1 (EPIRPSTD1), offset 0x038 ............................................. 531
January 20, 2012
23
Texas Instruments-Production Data