SN74ALVC3631_07 Datasheet, PDF (8/29 Pages) Texas Instruments – SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES

SN74ALVC3631, SN74ALVC3641, SN74ALVC3651
512 × 36, 1024 × 36, 2048 × 36
SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES
SDMS025B – OCTOBER 1999 – REVISED JUNE 2000
Table 3. Port-B Enable Function Table
CSB
H
L
L
L
L
L
L
L
W/RB
X
L
L
L
H
H
H
H
ENB
X
L
H
H
L
H
L
H
MBB
X
X
L
H
L
L
H
H
CLKB
X
X
↑
↑
X
↑
X
↑
B0–B35 OUTPUTS
In high-impedance state
In high-impedance state
In high-impedance state
In high-impedance state
Active, FIFO output register
Active, FIFO output register
Active, mail1 register
Active, mail1 register
PORT FUNCTION
None
None
None
Mail2 write
None
FIFO read
None
Mail1 read (set MBF1 high)
The setup- and hold-time constraints to the port clocks for the port-chip selects and write/read selects are only
for enabling write and read operations and are not related to high-impedance control of the data outputs. If a
port enable is low during a clock cycle, the port-chip select and write/read select can change states during the
setup- and hold-time window of the cycle.
When OR is low, the next data word is sent to the FIFO output register automatically by the CLKB low-to-high
transition that sets OR high. When OR is high, an available data word is clocked to the FIFO output register only
when a FIFO read is selected by CSB, W/RB, ENB, and MBB.
synchronized FIFO flags
Each FIFO flag is synchronized to its port clock through at least two flip-flop stages. This is done to improve the
flag’s reliability by reducing the probability of metastable events on their outputs when CLKA and CLKB operate
asynchronously with one another. OR and AE are synchronized to CLKB. IR and AF are synchronized to CLKA.
Table 4 shows the relationship of each flag to the number of words stored in memory.
Table 4. FIFO Flag Operation
NUMBER OF WORDS
IN FIFO†‡
SYNCHRONIZED
TO CLKB
OR
AE
SYNCHRONIZED
TO CLKA
AF
IR
0
L
L
H
H
1 to X
H
L
H
H
(X + 1) to [D§ – (Y + 1)]
H
H
H
H
(D§ – Y) to 2047
H
H
L
H
D§
H
H
L
L
† _{X is the almost-empty offset for AE. Y is the almost-full offset for AF.}
‡ _{When a word is present in the FIFO output register, its previous memory}
location is free.
§ _{D = 512 for the SN74ALVC3631, D = 1024 for the SN74ALVC3641, and}
D = 2048 for the SN74ALVC3651
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