SN74ALVC3631_07 Datasheet, PDF (4/29 Pages) Texas Instruments – SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES

SN74ALVC3631, SN74ALVC3641, SN74ALVC3651
512 × 36, 1024 × 36, 2048 × 36
SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES
SDMS025B – OCTOBER 1999 – REVISED JUNE 2000
functional block diagram
CLKA
CSA
W/RA
ENA
MBA
Port-A
Control
Logic
RST
Reset
Logic
36
A0–A35
IR
AF
Mail1
Register
512 × 36 or
1024 × 36 or
2048 × 36†
SRAM
Write
Pointer
Read
Pointer
Status-Flag
Logic
MBF1
RTM
RFM
B0–B35
OR
AE
FS0/SD
FS1/SEN
Flag-Offset
Register
10
Mail2
Register
MBF2
† _{512 × 36 for the SN74ALVC3631, 1024 × 36 for the SN74ALVC3641, and 2048 × 36 for the SN74ALVC3651}
Port-B
Control
Logic
CLKB
CSB
W/RB
ENB
MBB
4
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