NS16C2552 Datasheet, PDF (8/50 Pages) National Semiconductor (TI) – Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate

NS16C2552, NS16C2752
SNLS238D – AUGUST 2006 – REVISED APRIL 2013
www.ti.com
Reg
Addr
A2-A0
EFR
0x2
Default
XON1
0x4
Default
XON2
0x5
Default
XOFF1
0x6
Default
XOFF2
0x7
Default
Table 2. NS16C2552 Register Summary (continued)
RD/
WR
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0 Comment
Enhanced Registers
R/W
Auto CTS Auto RTS Special IER[7:4] SW Flow SW Flow SW Flow SW Flow
Ena
Ena
Char Sel IIR[5:4] Control Bit Control Bit Control Bit Control Bit
FCR[5:4]
3
2
1
0
MCR[7:5]
0
0
0
0
0
0
0
0
R/W
XON1
XON1
XON1
XON1
XON1
XON1
XON1
XON1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
0
0
0
R/W
XON2
XON2
XON2
XON2
XON2
XON2
XON2
XON2
LCR =
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0xBF
0
0
0
0
0
0
0
0
R/W
XOFF1
XOFF1
XOFF1
XOFF1
XOFF1
XOFF1
XOFF1
XOFF1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
0
0
0
R/W
XOFF2
XOFF2
XOFF2
XOFF2
XOFF2
XOFF2
XOFF2
XOFF2
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
0
0
0
Legend:
• Bit Name
• Default Value
The Nomenclature of register descriptions:
• Register name, address, register bit, and value example:
– FCR 0x2.7:6 = 2’b11 - bits 6 and 7 of FCR are both 1.
– Alternative description: FCR[7:6] = 2’b11.
• ‘b - binary number.
• ‘h - hex number.
• 0xNN - hex number.
• n’bN - n is the number of bits; N is the bit value. Example 8’b01010111 = 8’h57 = 0x57.
RECEIVE BUFFER REGISTER (RBR)
The receiver section contains an 8-bit Receive Shift Register (RSR) and a 16 (or 64)-byte FIFO that can be
accessed through Receive Buffer Register (RBR).
Table 3. RBR (0x0)
Bit
Bit Name
R/W Def
Description
7:0
RBR Data
R
Receive Buffer Register
0xXX
Rx FIFO data.
Note: This register value does not change upon MR reset.
8
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: NS16C2552 NS16C2752