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NS16C2552 Datasheet, PDF (33/50 Pages) National Semiconductor (TI) – Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate
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NS16C2552, NS16C2752
SNLS238D – AUGUST 2006 – REVISED APRIL 2013
Figure 17. Deviated Baud Rate Sampling
Giving some margin for sampling error due to metastability and jitter assuming that the bit period deviation can
not be more than 6/16 the bit time (i.e., the worst case), 0.375T. So that
(L − 0.5) x ΔT< 0.375T
for the receiver to correctly recover the transmitted data. Reform the equation
ΔT < 0.375T / (L − 0.5)
Using the same example of 11-bit packet (L = 11), at 9600 baud, f = 9600, the sampling clock rate is f (i.e., one
sample per period) and the bit period is
T=1/f
ΔT < 0.375T / (L − 0.5) = 0.375 / (f x (L − 0.5))
ΔT < 0.375 / (9600 x 10.5) = 3.7 x 10-6 (sec) or 3.7 µs.
The percentage of the deviation from nominal bit period has to be less than
ΔT / T = (0.375 / (f x (L − 0.5)) x f = 0.375 / L − 0.5)
ΔT / T =3.7 x 10-6 x 9600 = 3.6%
From the above example, the error percentage increases with longer packet length (i.e., larger L). The best case
is packet with word length 5, a start bit and a stop bit (L = 7) that is most tolerant to error.
ΔT / T = 0.375 / (L − 0.5) = 0.375 / 6.5 = 5.8%
The worst case is packet with word length 8, a start bit, a parity bit, and two stop bits (L = 12) that is least
tolerant to error.
ΔT / T = 0.375 / L − 0.5) = 0.375 / 11.5 = 3.2%
CRYSTAL REQUIREMENTS
The crystal used should meet the following requirements.
1. AT cut with parallel resonance.
2. Fundamental oscillation mode between 1 to 24 MHz.
3. Frequency tolerance and drift is well within the UART application requirements, and they are not a concern.
4. The load capacitance of the crystal should match the load capacitance of the oscillator circuitry seen by the
crystal. Under the AC conditions, the oscillator load capacitance is a lump sum of parasitic capacitance and
external capacitors. The capacitances connecting to oscillator input and output are in series seen by the
crystal. (Figure 18.) External capacitors, C1 and C2, are not required to be very accurate. The best practice
to follow crystal manufacturer’s recommendation for the load capacitance value.
Copyright © 2006–2013, Texas Instruments Incorporated
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