NS16C2552 Datasheet, PDF (21/50 Pages) National Semiconductor (TI) – Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate

NS16C2552, NS16C2752
www.ti.com
SNLS238D – AUGUST 2006 – REVISED APRIL 2013
SOFTWARE FLOW CONTROL REGISTERS (SFR)
The following four registers are used as programmable software flow control characters.
Table 21. Xon1 (0x4, LCR=0xBF)
Bit
Bit Name
R/W
Def
7:0
Xon1 Data
R/W Xon1 Data
0
Description
Table 22. Xon2 (0x5, LCR=0xBF)
Bit
Bit Name
R/W
Def
7:0
Xon2 Data
R/W Xon2 Data
0
Description
Table 23. Xoff1 (0x6, LCR=0xBF)
Bit
Bit Name
R/W
Def
7:0
Xoff1 Data
R/W Xoff1 Data
0
Description
Table 24. Xoff2 (0x7, LCR=0xBF)
Bit
Bit Name
R/W
Def
7:0
Xoff2 Data
R/W Xoff2 Data
0
Description
Operation and Configuration
CLOCK INPUT
The NS16C2552/2752 has an on-chip oscillator that accepts standard crystal with parallel resonant and
fundamental frequency. The generated clock is supplied to both UART channels with the capability range from
DC to 24 MHz. The frequency of the clock oscillator is divided by 16 internally, combined with an on-chip
programmable clock divider providing the baud rate for data transmission. The divisor is 16-bit with MSB byte in
DLM and LSB byte in DLL. The divisor calculation is shown in PROGRAMMABLE BAUD GENERATOR.
The external oscillator circuitry requires two load capacitors, a parallel resistor, and an optional damping resistor.
The oscillator circuitry is shown in Figure 4.
Figure 4. Crystal Oscillator Circuitry
The requirement of the crystal is listed in Table 25.
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