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LMH0340SQE Datasheet, PDF (8/30 Pages) Texas Instruments – 3 Gbps, HD, SD, DVB-ASI SDI Serializer and Cable Driver With LVDS Interface
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LMH0040, LMH0050
LMH0070, LMH0340
SNLS271I – APRIL 2007 – REVISED APRIL 2013
www.ti.com
SDI Output Characteristics — LMH0340 / LMH0040 / LMH0070 (continued)
Over supply and Operating Temperature ranges unless otherwise specified. (1)
Symbol
Parameter
Condition
Min
Typ
Δtt
Mismatch between rise and fall time ≥1.485 Gbps
(2)
Max
Units
30
ps
tSD
Propagation Delay Latency
See Figure 5
tJ
Peak to Peak Alignment Jitter
≥1.485 Gbps(3)
270 Mbps(3)
9.5
TXCLK
cycle
30
50
ps
100
200
ps
RL
Output Return Loss — EVK
Measured 5 MHz to 1485 MHz
15
20
dB
Specification (4)
Measured 1485 MHz to 2970
10
15
dB
MHz
tOS
Output Overshoot(2)
2.97 Gbps
8
%
1.485 Gbps
5
%
270 Mbps
2
%
(2) Specification ensured by characterization.
(3) Measured in accordance with SMPTE RP184. 100% production tested.
(4) Output Return Loss specification applies to measurement on the EVK PCB (LMH0340 ALP Daughter Card) per SMPTE requirements.
CML Output Characteristics — LMH0050
Over supply and Operating Temperature ranges unless otherwise specified. (1)
Symbol
Parameter
Condition
Min
Typ
Max
Units
VOD
Output Voltage
DR
Data Rate
into 100 Ω differential load
1175
270
1450
1485
mV
Mbps
tr
tf
tJ
ROUT
Output Rise Time
Output Fall Time
Peak-to-Peak Alignment Jitter
Output Termination Resistance
1.485 Gbps
Output Pin to VDD2V5 Pin
100
ps
100
ps
25
50
ps
40
50
60
Ω
(1) Typical Parameters measured at VDD3V3=3.3V, VDD2V5=2.5V, TA=25°C. They are for reference purposes and are not production tested.
Device Switching Characteristics
Over supply and Operating Temperature ranges unless otherwise specified. (1)
Symbol
Parameter
Condition
Min
Typ
Max
Units
tTPLD
Device Lock Time
2.97 Gbps
1.485 Gbps
10
ms
11
ms
270 Mbps
15
ms
(1) Typical Parameters measured at VDD3V3=3.3V, VDD2V5=2.5V, TA=25°C. They are for reference purposes and are not production tested.
TXN
TXCLK
TXOUT
Symbol N
Symbol N+1
Symbol N+2
tSD
Symbol N+3
Symbol N+4
Symbol N-4
Symbol N-3
Symbol N-2
Symbol N-1
Symbol N
Figure 5. LVDS Interface Propagation Delay
8
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