LMH0340SQE Datasheet, PDF (13/30 Pages) Texas Instruments – 3 Gbps, HD, SD, DVB-ASI SDI Serializer and Cable Driver With LVDS Interface

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LMH0040, LMH0050
LMH0070, LMH0340
SNLS271I – APRIL 2007 – REVISED APRIL 2013
To read the data value from a register, first the host writes the device address with the LSB set to a ‘0’ denoting
a write, and then the register address is written to the device. The host then reasserts the START condition, and
writes the device address once again, but this time with the LSB set to a ‘1’ denoting a read, and following this
the SER will drive the SDA line with the data from the addressed register. The host indicates that it has finished
reading the data by asserting a ‘0’ for the ACK bit. After reading the last byte, the host will assert a ‘1’ for NACK
to indicate to the SER that it does not require any more data.
Note that the SMBus pins are not 5V compliant and they must be driven by a 3.3V source.
SMBus CONFIGURATIONS
Many different configurations of the SMBus are possible and depend upon the specific requirements of the
applications. Several possible applications are described.
CONFIGURATION 1
The SER SMB_CS may be tied High (always enabled) since it is the only device on the SMBus. See Figure 9.
CONFIGURATION 2
Since the multiple SER devices have the same address, the use of the individual SMB_CS signals is required.
To communicate with a specific device, its SMB_CS is driven High to select the device. After the transaction is
complete, its SMB_CS is driven Low to disable its SMB interface. Other devices on the bus may now be selected
with their respective chip select signals and communicated with. See Figure 10.
CONFIGURATION 3
The addressing field is limited to 7-bits by the SMBus protocol. Thus it is possible that multiple devices may
share the same 7-bit address. An optional feature in the SMBus 2.0 specification supports an Address Resolution
Protocol (ARP). This optional feature is not supported by the LMH0340/0040/0070/0050 devices. Solutions for
this include: the use of the independent SMB_CS signals, independent SMBus segments, or other means. See
Figure 11.
FPGA
Host
3V3
SMBus
3V3
Device
Figure 9. SMBus Configuration 1 — Host to single device
FPGA
Host
3V3
SMBus
Device
SMBus
Device
SMBus
Device
Figure 10. SMBus Configuration 2 — Host to multiple devices with SMB_CS signals
Copyright © 2007–2013, Texas Instruments Incorporated
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