LMH0340SQE Datasheet, PDF (6/30 Pages) Texas Instruments – 3 Gbps, HD, SD, DVB-ASI SDI Serializer and Cable Driver With LVDS Interface

LMH0040, LMH0050
LMH0070, LMH0340
SNLS271I – APRIL 2007 – REVISED APRIL 2013
www.ti.com
LVDS Switching Characteristics
Over supply and Operating Temperature ranges unless otherwise specified. ⁽¹⁾
Symbol
Parameter
Condition
Min
Typ
Max
Units
t_CIP
TxCLKIN Period
t_CIT
TxCLKIN Transition Time
t_CIH
TxCLKIN IN High Time
t_CIL
TxCLKIN IN Low Time
t_XIT
TxIN Transition Time
t_STC
TxIN Setup to TxCLKIN
t_HTC
TxIN Hold to TxCLKIN
See Figure 2
See Figure 3
See Figure 2
See Figure 2
See Figure 2 ⁽²⁾
3.2
2T
37
ns
0.5
1.0
3.0
ns
0.7T
T
1.3T
ns
0.7T
T
1.3T
ns
0.15
3
ns
-550
ps
900
ps
(1) Typical Parameters measured at V_DD3V3=3.3V, V_DD2V5=2.5V, T_A=25°C. They are for reference purposes and are not production tested.
(2) Parameter uses default settings in registers: 0x24'h and 0x30'h.
TXCLK
+100 mV
-100 mV
t_CIP/2
t_CIL, t_CIH
t_STC
0V
t_HTC
TXn
Setup
Hold 0V
Figure 2. LVDS Input Timing Diagram
80%
TXCLK
20%
t_CIT
80%
t_CIT
20%
Figure 3. Transmit Clock Transition Times
SMBus Input Electrical Characteristics
Over supply and Operating Temperature ranges unless otherwise specified. ⁽¹⁾
Symbol
Parameter
Condition
Min
Typ
Max
Units
V_SIL
V_SIH
I_SPULLUP
Data, Clock Input Low Voltage
Data, Clock Input High Voltage
Current through pull-up resistor or
(2)
current source
0.8
V
2
V_SDD
V
4
mA
V_SDD
I_SLEAKB
I_SLEAKP
C_SI
R_STERM
Nominal Bus Voltage
Input Leakage per bus segment
(2)
Input Leakage per pin
Capacitance for SMBdata and SMBclk ^{(2) (3)}
Termination Resistance
V_SDD3V3 ^{(4) (3) (2)}
2.375
3.6
V
−200
200
μA
−10
10
μA
10
pF
1000
Ω
(1) Typical Parameters measured at V_DD3V3=3.3V, V_DD2V5=2.5V, T_A=25°C. They are for reference purposes and are not production tested.
(2) Recommended value—Parameter is not tested.
(3) Recommended maximum capacitance load per bus segment is 400 pF.
(4) Maximum termination voltage should be identical to the device supply voltage.
6
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