LMH0340SQE Datasheet, PDF (21/30 Pages) Texas Instruments – 3 Gbps, HD, SD, DVB-ASI SDI Serializer and Cable Driver With LVDS Interface

www.ti.com
ADD
'h
03
Name
GPIO_1
Configuration
04
GPIO_2
Configuration
05
GP INPUT
06
GP OUTPUT
07–10
11
Reserved
DVB_ASI Idle_A
12
DVB_ASI Idle_B
13–1C
Reserved
LMH0040, LMH0050
LMH0070, LMH0340
SNLS271I – APRIL 2007 – REVISED APRIL 2013
Table 2. SER Register Detail Table (continued)
Bits
Field
R/W
Default
Description
This register configures GPIO_1. Note, if this pin is to be used as an input, then the output must be TRI-
STATE (bit[0]=’0’) and if used as an output, then the input buffer must be disabled (bit[1]=’0’).
7:4
GPIO_1_mode[3:0]
r/w
0000'b
0000: Power On Reset
0001: GPout register
0010: pll lock
0100: Data LOS [0]
0101: Data LOS [1]
0110: Data LOS [2]
0111: Data LOS [3]
1000: Data LOS [4]
all others: reserved
3:2
GPIO_1_ren[1:0]
r/w
01'b
00: pullup and pulldown disabled
01: pulldown enabled
10: pullup enabled
11: Reserved
1
GPIO_1_sleepz
r/w
0'b
0: input buffer disabled
1: input buffer enabled
0
GPout1 enable
r/w
1'b
0: output in TRI-STATE mode
1: output enabled
This register configures GPIO_2. Note, if this pin is to be used as an input, then the output must be TRI-
STATE (bit[0]=’0’) and if used as an output, then the input buffer must be disabled (bit[1]=’0’).
7:4
GPIO_2_mode[3:0]
r/w
0000'b
0000: GPout register
0001: always on out
0010: parallel to serial clk out
0011: parallel clock output
0100: TXCLK Digital out
all others: reserved
3:2
GPIO_2_ren[1:0]
r/w
01'b
00: pullup and pulldown disabled
01: pulldown enabled
10: pullup enabled
11: Reserved
1
GPIO_2_sleepz
r/w
0'b
0: input buffer disabled
1: input buffer enabled
0
GPout2 enable
r/w
0'b
0: output TRI-STATEd
1: output enabled
If any of the GPIO pins are configured as inputs, then reading from this register provides the values on
those input pins.
7:3
Reserved
2
r
input data on GPIO_2
1
r
input data on GPIO_1
0
r
input data on GPIO_0
If the GPIO pins are configured as general purpose output pins, then writing to this register has the
effect of transferring the bits in this register to the output buffers of the appropriate GPIO pins.
7:3
Reserved
2
r/w
0'b
output data on GPIO_2
1
r/w
0'b
output data on GPIO_1
0
r/w
0'b
output data on GPIO_0
When in DVB-ASI mode, idle characters are inserted into the datastream when there is no valid data to
transmit. The idle character default is K28.5 but if desired, that can be redefined via this register pair.
7:0
r/w
BC'h
K28.5 Idle character used for DVB_ASI
DVB-ASI mode, idle character LSBs
7:2
Reserved
1:0
r/w
01'b
K28.5 Idle character used for DVB_ASI
Copyright © 2007–2013, Texas Instruments Incorporated
Submit Documentation Feedback
21
Product Folder Links: LMH0040 LMH0050 LMH0070 LMH0340