English
Language : 

MSP430F23X_14 Datasheet, PDF (74/93 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER
MSP430F23x
MSP430F24x(1)
MSP430F2410
SLAS547I – JUNE 2007 – REVISED DECEMBER 2012
Port P5 Pin Schematic: P5.0 to P5.3, Input/Output With Schmitt Trigger
P5REN.x
P5DIR.x
0
Module Direction
1
Direction
0: Input
1: Output
DVSS 0
DVCC 1
Pad Logic
1
www.ti.com
P5OUT.x
0
Module X OUT
1
P5SEL.x
P5IN.x
EN
Module X IN
D
P5.0/UCB1STE/UCA1CLK
P5.1/UCB1SIMO/UCB1SDA
P5.2/UCB1SOMI/UCB1SCL
P5.3/UCB1CLK/UCA1STE
Table 25. Port P5.0 to P5.3 Pin Functions
PIN NAME (P5.x)
P5.0/UCB1STE (2)/UCA1CLK (2)
P5.1/UCB1SIMO (2)/UCB1SDA (2)
P5.2/UCB1SOMI (2)/UCB1SCL (2)
P5.3/UCB1CLK (2)/UCA1STE (2)
x
FUNCTION
0 P5.0 (I/O)
UCB1STE (2)/UCA1CLK (2) (3) (4)
1 P5.1 (I/O)
UCB1SIMO (2)/UCB1SDA (2) (3) (5)
2 P5.2 (I/O)
UCB1SOMI (2)/UCB1SCL (2) (3) (5)
3 P5.3 (I/O)
UCB1CLK (2)/UCA1STE (2) (3)
CONTROL BITS /
SIGNALS (1)
P5DIR.x
P5SEL.x
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
(1) X = Don't care
(2) MSP430F24x and MSP430F24x1 devices only
(3) The pin direction is controlled by the USCI module.
(4) UCA0CLK function takes precedence over UCB0STE function. If the pin is required as UCA0CLK input or output, USCI A/B0 is forced to
3-wire SPI mode if 4-wire SPI mode is selected.
(5) If I2C functionality is selected, the output drives only the logical 0 to VSS level.
74
Submit Documentation Feedback
Copyright © 2007–2012, Texas Instruments Incorporated