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MSP430FR5989-EP Datasheet, PDF (73/154 Pages) Texas Instruments – Mixed-Signal Microcontroller
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MSP430FR5989-EP
SLASEC9 – APRIL 2017
5.11.14 Timer_B TB0
TB0 is a 16-bit timer/counter (Timer_B type) with seven capture/compare registers each. TB0 can support
multiple capture/compares, PWM outputs, and interval timing (see Table 5-16). TB0 has extensive
interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each
of the capture/compare registers.
Table 5-16. Timer_B TB0 Signal Connections
INPUT PORT PIN
DEVICE INPUT
SIGNAL
MODULE INPUT
SIGNAL
P2.0 or P3.3 or
P5.7
P2.0 or P3.3 or
P5.7
P3.4
P6.4
TB0CLK
ACLK (internal)
SMCLK (internal)
TB0CLK
TB0.0
TB0.0
TBCLK
ACLK
SMCLK
INCLK
CCI0A
CCI0B
P3.5 or P6.5
DVSS
DVCC
TB0.1
COUT (internal)
GND
VCC
CCI1A
CCI1B
P3.6 or P6.6
P2.4
P3.7
P2.5
P2.2
P2.6
P2.1
P2.7
P2.0
DVSS
DVCC
TB0.2
ACLK (internal)
DVSS
DVCC
TB0.3
TB0.3
DVSS
DVCC
TB0.4
TB0.4
DVSS
DVCC
TB0.5
TB0.5
DVSS
DVCC
TB0.6
TB0.6
DVSS
DVCC
GND
VCC
CCI2A
CCI2B
GND
VCC
CCI3A
CCI3B
GND
VCC
CCI4A
CCI4B
GND
VCC
CCI5A
CCI5B
GND
VCC
CCI6A
CCI6B
GND
VCC
MODULE
BLOCK
Timer
CCR0
CCR1
CCR2
CCR3
CCR4
CCR5
CCR6
MODULE
OUTPUT
SIGNAL
DEVICE OUTPUT
SIGNAL
OUTPUT PORT PIN
N/A
N/A
P3.4
P6.4
TB0
TB0.0
ADC12 (internal)
ADC12SHSx = {2}
P3.5
P6.5
TB1
TB0.1
ADC12 (internal)
ADC12SHSx = {3}
TB2
TB0.2
P3.6
P6.6
TB3
TB0.3
P2.4
P3.7
TB4
TB0.4
P2.5
P2.2
TB5
TB0.5
P2.6
P2.1
TB6
TB0.6
P2.7
P2.0
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