MSP430FR5989-EP Datasheet, PDF (122/154 Pages) Texas Instruments – Mixed-Signal Microcontroller

MSP430FR5989-EP
SLASEC9 – APRIL 2017
www.ti.com
Table 5-38. Port J Registers (Base Address: 0320h)
REGISTER DESCRIPTION
Port PJ input
Port PJ output
Port PJ direction
Port PJ resistor enable
Port PJ selection 0
Port PJ selection 1
Port PJ complement selection
REGISTER
PJIN
PJOUT
PJDIR
PJREN
PJSEL0
PJSEL1
PJSELC
OFFSET
00h
02h
04h
06h
0Ah
0Ch
16h
Table 5-39. Timer_A TA0 Registers (Base Address: 0340h)
REGISTER DESCRIPTION
TA0 control
Capture/compare control 0
Capture/compare control 1
Capture/compare control 2
Capture/compare control 3
Capture/compare control 4
TA0 counter
Capture/compare 0
Capture/compare 1
Capture/compare 2
Capture/compare 3
Capture/compare 4
TA0 expansion 0
TA0 interrupt vector
REGISTER
TA0CTL
TA0CCTL0
TA0CCTL1
TA0CCTL2
TA0CCTL3
TA0CCTL4
TA0R
TA0CCR0
TA0CCR1
TA0CCR2
TA0CCR3
TA0CCR4
TA0EX0
TA0IV
OFFSET
00h
02h
04h
06h
08h
0Ah
10h
12h
14h
16h
18h
1Ah
20h
2Eh
Table 5-40. Timer_A TA1 Registers (Base Address: 0380h)
REGISTER DESCRIPTION
TA1 control
Capture/compare control 0
Capture/compare control 1
Capture/compare control 2
TA1 counter
Capture/compare 0
Capture/compare 1
Capture/compare 2
TA1 expansion 0
TA1 interrupt vector
REGISTER
TA1CTL
TA1CCTL0
TA1CCTL1
TA1CCTL2
TA1R
TA1CCR0
TA1CCR1
TA1CCR2
TA1EX0
TA1IV
OFFSET
00h
02h
04h
06h
10h
12h
14h
16h
20h
2Eh
Table 5-41. Timer_B TB0 Registers (Base Address: 03C0h)
REGISTER DESCRIPTION
TB0 control
Capture/compare control 0
Capture/compare control 1
Capture/compare control 2
Capture/compare control 3
Capture/compare control 4
REGISTER
TB0CTL
00h
TB0CCTL0
02h
TB0CCTL1
04h
TB0CCTL2
06h
TB0CCTL3
08h
TB0CCTL4
0Ah
OFFSET
122 Detailed Description
Submit Documentation Feedback
Product Folder Links: MSP430FR5989-EP
Copyright © 2017, Texas Instruments Incorporated